SL-ADP-PCIe-M2 Datasheet and Pinout - Revision history

Piotrzbysinski: /* Features */

2021-05-04T11:28:02Z

Features

← Older revision		Revision as of 11:28, 4 May 2021
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	* Equipped with M.2 key M SSD socket		* Equipped with M.2 key M SSD socket
	* Single rail +3.3V power supply		* Single rail +3.3V power supply
	* ~~Dual~~ lane PCIe communication interface		* Single lane PCIe communication interface
	* Operating temperature -30÷+85°C		* Operating temperature -30÷+85°C
	* Fully compatible with SoMLabs carrier boards equippped with PCIe interface on FPC16 connector		* Fully compatible with SoMLabs carrier boards equippped with PCIe interface on FPC16 connector

2021-05-04T11:25:58Z

General description

← Older revision		Revision as of 11:25, 4 May 2021
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	[[File:SL-ADP-PCIe-M2-ssd.png\|800px\|center]]		[[File:SL-ADP-PCIe-M2-ssd.png\|800px\|center]]
	<br>		<br>
	SL-ADP-PCIe-M2 is adapter dedicated to using M.2 mass storage (SSD, single ~~or dual~~ lane) in embedded systems based on i.MX8Mmini MPU. The SL-ADP-PCIe-M2 module is equipped with M.2 key M connector and is compatible with 2242, 2260 or 2280 modules.<br>The SL-ADP-PCIe-M2 module is equipped with FPC16 connector - the same like in SoMLabs carrier board VisionCB-8M-STD.		SL-ADP-PCIe-M2 is adapter dedicated to using M.2 mass storage (SSD, single lane) in embedded systems based on i.MX8Mmini MPU. The SL-ADP-PCIe-M2 module is equipped with M.2 key M connector and is compatible with 2242, 2260 or 2280 modules.<br>The SL-ADP-PCIe-M2 module is equipped with FPC16 connector - the same like in SoMLabs carrier board VisionCB-8M-STD.

	== Features ==		== Features ==

2021-05-04T11:25:25Z

General description

← Older revision		Revision as of 11:25, 4 May 2021
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	[[File:SL-ADP-PCIe-M2-ssd.png\|800px\|center]]		[[File:SL-ADP-PCIe-M2-ssd.png\|800px\|center]]
	<br>		<br>
	SL-ADP-PCIe-M2 is adapter dedicated to using M.2 mass storage (SSD) in embedded systems based on i.MX8Mmini MPU. The SL-ADP-PCIe-M2 module is equipped with M.2 key M connector and is compatible with 2242, 2260 or 2280 modules.<br>The SL-ADP-PCIe-M2 module is equipped with FPC16 connector - the same like in SoMLabs carrier board VisionCB-8M-STD.		SL-ADP-PCIe-M2 is adapter dedicated to using M.2 mass storage (SSD, single or dual lane) in embedded systems based on i.MX8Mmini MPU. The SL-ADP-PCIe-M2 module is equipped with M.2 key M connector and is compatible with 2242, 2260 or 2280 modules.<br>The SL-ADP-PCIe-M2 module is equipped with FPC16 connector - the same like in SoMLabs carrier board VisionCB-8M-STD.

	== Features ==		== Features ==

2021-05-04T11:24:55Z

General description

← Older revision		Revision as of 11:24, 4 May 2021
Line 4:		Line 4:
	[[File:SL-ADP-PCIe-M2-ssd.png\|800px\|center]]		[[File:SL-ADP-PCIe-M2-ssd.png\|800px\|center]]
	<br>		<br>
	SL-ADP-PCIe-M2 is adapter dedicated to using M.2 mass storage (SSD) in embedded systems based on i.MX8Mmini.		SL-ADP-PCIe-M2 is adapter dedicated to using M.2 mass storage (SSD) in embedded systems based on i.MX8Mmini MPU. The SL-ADP-PCIe-M2 module is equipped with M.2 key M connector and is compatible with 2242, 2260 or 2280 modules.<br>The SL-ADP-PCIe-M2 module is equipped with FPC16 connector - the same like in SoMLabs carrier board VisionCB-8M-STD.
	The SL-ADP-PCIe-M2 module is equipped with FPC16 connector - the same like in SoMLabs carrier board VisionCB-8M-STD.

	== Features ==		== Features ==

2021-05-04T11:21:22Z

PCIe Pinout

← Older revision		Revision as of 11:21, 4 May 2021
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	\|-		\|-
	\|}		\|}
	~~<br>~~
	<br>Note:		<br>Note:
	<br>1. nPERST, nCLKREQ and nPEWAKE pins are connected to +3.3V with 10k pull-up resistors.		<br>1. nPERST, nCLKREQ and nPEWAKE pins are connected to +3.3V with 10k pull-up resistors.

2021-05-04T11:21:05Z

Electrical parameters

← Older revision		Revision as of 11:21, 4 May 2021
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	\|-		\|-
	\|}		\|}
	~~<br>~~
	<br>Note:		<br>Note:
	<br>1. Current consumption value without SSD module.		<br>1. Current consumption value without SSD module.

2021-05-04T11:20:23Z

PCIe Pinout

← Older revision		Revision as of 11:20, 4 May 2021
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	\|-		\|-
	\|}		\|}
			<br>
			<br>Note:
			<br>1. nPERST, nCLKREQ and nPEWAKE pins are connected to +3.3V with 10k pull-up resistors.
			<br>2. 32kHz generator connected to SUSCLK input.
			<br>3. ACT LED is controlled by DAS/DSS/nLED1 pin.

	== Dimensions ==		== Dimensions ==
	<br>		<br>
	[[File:SL-ADP-PCIe-M2-dimension.jpg\|center]]		[[File:SL-ADP-PCIe-M2-dimension.jpg\|center]]

2021-05-04T11:20:04Z

Electrical parameters

← Older revision		Revision as of 11:20, 4 May 2021
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	<br>Note:		<br>Note:
	<br>1. Current consumption value without SSD module.		<br>1. Current consumption value without SSD module.
	~~<br>2. nPERST, nCLKREQ and nPEWAKE pins are connected to +3.3V with 10k pull-up resistors.~~
	~~<br>3. 32kHz generator connected to SUSCLK input.~~
	~~<br>4. ACT LED is controlled by DAS/DSS/nLED1 pin.~~

	== PCIe Pinout ==		== PCIe Pinout ==

2021-05-04T11:19:33Z

Electrical parameters

← Older revision		Revision as of 11:19, 4 May 2021
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	<br>		<br>
	<br>Note:		<br>Note:
	<br>1. Current value without SSD module ~~consumption~~.		<br>1. Current consumption value without SSD module.
	<br>2. nPERST, nCLKREQ and nPEWAKE pins are connected to +3.3V with 10k pull-up resistors.		<br>2. nPERST, nCLKREQ and nPEWAKE pins are connected to +3.3V with 10k pull-up resistors.
	<br>3. 32kHz generator connected to SUSCLK.		<br>3. 32kHz generator connected to SUSCLK input.
	<br>4. ACT LED is controlled by DAS/DSS/nLED1 pin.		<br>4. ACT LED is controlled by DAS/DSS/nLED1 pin.

2021-05-04T11:16:53Z

Electrical parameters

← Older revision		Revision as of 11:16, 4 May 2021
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	<br>2. nPERST, nCLKREQ and nPEWAKE pins are connected to +3.3V with 10k pull-up resistors.		<br>2. nPERST, nCLKREQ and nPEWAKE pins are connected to +3.3V with 10k pull-up resistors.
	<br>3. 32kHz generator connected to SUSCLK.		<br>3. 32kHz generator connected to SUSCLK.
			<br>4. ACT LED is controlled by DAS/DSS/nLED1 pin.

	== PCIe Pinout ==		== PCIe Pinout ==