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VisionSOM-RT Datasheet and Pinout: Difference between revisions

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== General description ==
== General description ==
[[File:VisionSOM-RT-v_1_1.png|500px|center]]
[[File:VisionSOM-RT-v_1_1.png|500px|center]]
 
 
The VisionSOM-RT family is a SODIMM-sized SoM based on the NXP i.MX RT application processor which features an advanced implementation of a single ARM Cortex-M7 core (at speeds up to 600MHz).
The VisionSOM-RT family is a SODIMM-sized SoM based on the NXP i.MX RT application processor which features an advanced implementation of a single ARM Cortex-M7 core (at speeds up to 600MHz).


Line 13: Line 13:


=== Applications ===
=== Applications ===
* Industrial embedded Linux computer
* Industrial embedded RTOS computer
* Home Appliances
* Home Appliances
* Home Automation – Smart Home
* Home Automation – Smart Home
Line 182: Line 182:
| <center>V</center>
| <center>V</center>
| Connected to +5VIN SODIMM pin
| Connected to +5VIN SODIMM pin
|-
| Internal LDO output voltage
| <center>3.3</center>
| <center>V</center>
| Generated by internal LDO
|-
| Internal LDO output current
| <center>500</center>
| <center>mA</center>
| Maximum value
|-
|-
| Input GPIO voltage
| Input GPIO voltage
| <center>3.3</center>
| <center>0...+3.3</center>
| <center>V</center>
| <center>V</center>
| -
| -
Line 219: Line 229:
| -
| -
| Total Supply Current<sup>1</sup>
| Total Supply Current<sup>1</sup>
| x
| -
| x
| 80
| x
| 150
| A
| mA
|-
|-
| VGPIO
| VGPIO
Line 263: Line 273:
2. Applying the maximum voltage 3.6V results in shorten lifetime. Recommended value is smaller than 3.5V.<br />
2. Applying the maximum voltage 3.6V results in shorten lifetime. Recommended value is smaller than 3.5V.<br />


== SOM pinout ==
== Pinout ==
Important notes:<br />
1. Detail pin configurations description you can find, edit and arrange in dedicated MEX files (with free "i.MX Pin Tool" configurational tool):
[https://somlabs.com/wp-content/uploads/SoMLabs-VisionSoM-RT1052-QSPI.zip VisionSOM-RT52 with QSPI Flash memory on board] or
[https://somlabs.com/wp-content/uploads/SoMLabs-VisionSoM-RT1052-eMMC.zip VisionSOM-RT52 with eMMC Flash memory on board]<br />
2. LCD_DATAxx pins are internally used for boot sequence configuration. We recommend to use LCD_DATAxx lines as outputs or using eFuse boot configuration. <br />
3. Internal peripherals and pin functions depends on i.MX-RT version (i.a. in RT1052 there is just one Ethernet channel). Description in table fits to RT1052 model.
 
{| class="wikitable"
{| class="wikitable"
! style="text-align: center; font-weight: bold;" | SODIMM PIN
! style="text-align: center; font-weight:bold;" | SODIMM pin
! style="text-align: center; font-weight: bold;" | Functional
! style="text-align: center; font-weight:bold;" | Functional domain
domain
! style="text-align: center; font-weight:bold;" | Function name
! style="text-align: center; font-weight: bold;" | Function name
! style="text-align: center; font-weight:bold;" | i.MX-RT pad name
! style="text-align: center; font-weight: bold;" | i.MX6 UltraLite/
! style="text-align: center; font-weight:bold;" | Description (refer to i.MX-RT manuals for details)
ULL Pad Name
! style="text-align: center; font-weight: bold;" | Alternate functions
! Description (refer to i.MX6 UltraLite/ULL manuals for details)
|-
|-
| 1
| 1
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
Line 284: Line 297:
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
Line 292: Line 304:
| PMIC-STBY-REQ
| PMIC-STBY-REQ
| CCM_PMIC_STBY_REQ
| CCM_PMIC_STBY_REQ
| -
| Output, leave open if not used.
| Output, leave open if not used.
|-
|-
| 4
| 4
| Ctrl
| Ctrl
| MX6-POR-B
| MX-POR-B
| -
| -
| -
| External warm reset input, active L.
| External warm reset input, active L.
Line 306: Line 316:
| PMIC-ON-REQ
| PMIC-ON-REQ
| SNVS_PMIC_ON_REQ
| SNVS_PMIC_ON_REQ
| -
| Output, leave open if not used.
| Output, leave open if not used.
|-
|-
Line 313: Line 322:
| VDD-SNVS-3V3
| VDD-SNVS-3V3
| VDD_SNVS_IN
| VDD_SNVS_IN
| -
| SNVS backup power supply must be held between 2.9V and 3.3V if the system requires keeping real time and other data on OFF state. Internally connected to +3.3V, leave open.
| SNVS backup power supply must be held between 2.9V and 3.3V if the system requires keeping real time and other data on OFF state. Internally connected to +3.3V, leave open.
|-
|-
| 7
| 7
| BOOT
| BOOT
| BOOT-MODE1
| BOOT1
| BOOT_MODE1
| GPIO_AD_B0_05
| GPIO5_IO11
| BOOT1 configuration line or multifunction GPIO with 3.3V logic levels.
| BOOT-MODE1 BOOT-MODE0
By default this line is pulled-up with 1k resistor.
 
00 boot from fuses (default)
 
01 serial downloader
 
10 internal boot
 
11 reserved
 
|-
|-
| 8
| 8
Line 336: Line 335:
| VDD-COIN-3V
| VDD-COIN-3V
| VDD_SNVS_IN
| VDD_SNVS_IN
| -
| Optional external coin battery for SNVS power domain, must be held between 2.9V and 3.3V if the system requires keeping real time and other data on OFF state.
| Optional external coin battery for SNVS power domain, must be held between 2.9V and 3.3V if the system requires keeping real time and other data on OFF state.
Leave open if not used.
Leave open if not used.
Line 342: Line 340:
| 9
| 9
| BOOT
| BOOT
| BOOT-MODE0
| BOOT0
| BOOT_MODE0
| GPIO_AD_B0_04
| GPIO5_IO10
| BOOT1 configuration line or multifunction GPIO with 3.3V logic levels.
| BOOT-MODE1 BOOT-MODE0
Pin shared with GPIO-B0-04 line.
 
By default this line is pulled-down with 10k resistor.
00 boot from fuses (default)
|-
 
| 10
01 serial downloader
| NC
 
| -
10 internal boot
| -
 
| Not internally connected.
11 reserved
 
|-
| 10
| GPIO-SNVS
| SNVS-TAMPER9
| SNVS_TAMPER9
| GPIO5_IO09
| Tamper input (SNVS power domain) or GPIO 3.3V.
|-
|-
| 11
| 11
Line 367: Line 356:
| USB-OTG2-VBUS
| USB-OTG2-VBUS
| USB_OTG2_VBUS
| USB_OTG2_VBUS
| -
| +5V USB bus. Leave open if not used.
| +5V USB bus. Leave open if not used.
|-
|-
| 12
| 12
| GPIO-SNVS
| NC
| SNVS-TAMPER5
| -
| SNVS_TAMPER5
| -
| GPIO5_IO05
| Not internally connected.
| Tamper input (SNVS power domain) or GPIO 3.3V.
|-
|-
| 13
| 13
Line 381: Line 368:
| USB-OTG1-VBUS
| USB-OTG1-VBUS
| USB_OTG1_VBUS
| USB_OTG1_VBUS
| -
| +5V USB bus. Leave open if not used.
| +5V USB bus. Leave open if not used.
|-
|-
Line 387: Line 373:
| Ctrl
| Ctrl
| ONOFF
| ONOFF
| SRC_RESET_B
| ONOFF
|
| Input for power interrupt generation. Leave open if not used.
| Input for power interrupt generation. Leave open if not used.
|-
|-
Line 394: Line 379:
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
Line 402: Line 386:
| POR-B
| POR-B
| POR_B
| POR_B
| -
| Cold reset negative logic input resets all modules and logic in the IC.May be used in addition to internally generated power on reset signal (logical AND, both internal and external signals are considered active low). The POR_B input (if used) must be immediately asserted at power-up and remain asserted until after the last power rail reaches its working voltage.
| Cold reset negative logic input resets all modules and logic in the IC.
May be used in addition to internally generated power on reset signal (logical AND, both internal and external signals are considered active low).
|-
|-
| 17
| 17
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
|-
|-
| 18
| 18
| GPIO-SNVS
| NC
| SNVS-TAMPER8
| -
| SNVS_TAMPER8
| -
| GPIO5_IO08
| Not internally connected.
| Tamper input (SNVS power domain) or GPIO 3.3V.
|-
|-
| 19
| 19
Line 424: Line 404:
| USB-OTG2-DP
| USB-OTG2-DP
| USB_OTG2_DP
| USB_OTG2_DP
| -
| Leave open if not used.
| Leave open if not used.
|-
|-
Line 430: Line 409:
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
Line 438: Line 416:
| USB-OTG2-DN
| USB-OTG2-DN
| USB_OTG2_DN
| USB_OTG2_DN
| -
| Leave open if not used.
| Leave open if not used.
|-
|-
Line 444: Line 421:
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
Line 451: Line 427:
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
|-
|-
| 24
| 24
| GPIO-SNVS
| NC
| SNVS-TAMPER7
| -
| SNVS_TAMPER7
| -
| GPIO5_IO07
| Not internally connected.
| Tamper input (SNVS power domain) or GPIO 3.3V.
|-
|-
| 25
| 25
Line 466: Line 440:
| USB-OTG1-DP
| USB-OTG1-DP
| USB_OTG1_DP
| USB_OTG1_DP
| -
| Leave open if not used.
| Leave open if not used.
|-
|-
Line 472: Line 445:
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
Line 480: Line 452:
| USB-OTG1-DN
| USB-OTG1-DN
| USB_OTG1_DN
| USB_OTG1_DN
| -
| Leave open if not used.
| Leave open if not used.
|-
|-
Line 486: Line 457:
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
Line 493: Line 463:
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
|-
|-
| 30
| 30
| GPIO-SNVS
| NC
| SNVS-TAMPER4
| -
| SNVS_TAMPER4
| -
| GPIO5_IO04
| Not internally connected.
| Tamper input (SNVS power domain) or GPIO 3.3V.
|-
|-
| 31
| 31
Line 508: Line 476:
| nUSB-OTG-CHD
| nUSB-OTG-CHD
| USB_OTG1_CHD_B
| USB_OTG1_CHD_B
| -
| Leave open if not used.
| Leave open if not used.
|-
|-
| 32
| 32
| GPIO-SNVS
| NC
| SNVS-TAMPER1
| -
| SNVS_TAMPER1
| -
| GPIO5_IO01
| Not internally connected.
| Tamper input (SNVS power domain) or GPIO 3.3V.
|-
|-
| 33
| 33
| JTAG
| JTAG
| JTAG-MOD
| JTAG-MOD
| JTAG_MOD
| GPIO_AD_B0_08
| -
| JTAG mode selector. multifunction GPIO with 3.3V levels. Leave open if not used (bulit-in 4.7k pull-down resistor).
| Leave open if not used.
|-
|-
| 34
| 34
| GPIO-SNVS
| NC
| SNVS-TAMPER3
| -
| SNVS_TAMPER3
| -
| GPIO5_IO03
| Not internally connected.
| Tamper input (SNVS power domain) or GPIO 3.3V.
|-
|-
| 35
| 35
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
|-
|-
| 36
| 36
| GPIO-SNVS
| NC
| SNVS-TAMPER0
| -
| SNVS_TAMPER0
| -
| GPIO5_IO00
| Not internally connected.
| Tamper input (SNVS power domain) or GPIO 3.3V.
|-
|-
| 37
| 37
Line 550: Line 512:
| CLK1-N
| CLK1-N
| CCM_CLK1_N
| CCM_CLK1_N
| -
| General purpose differential high speed clock input/output.Leave open if not used.
| General purpose differential high speed clock input/output.
Leave open if not used.
|-
|-
| 38
| 38
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
Line 565: Line 524:
| CLK1-P
| CLK1-P
| CCM_CLK1_P
| CCM_CLK1_P
| -
| General purpose differential high speed clock input/output.Leave open if not used.
| General purpose differential high speed clock input/output.
Leave open if not used.
|-
|-
| 40
| 40
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
Line 579: Line 535:
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
|-
|-
| 42
| 42
| GPIO-SNVS
| NC
| SNVS-TAMPER6
| -
| SNVS_TAMPER6
| -
| GPIO5_IO06
| Not internally connected.
| Tamper input (SNVS power domain) or GPIO 3.3V.
|-
|-
| 43
| 43
| JTAG
| JTAG
| JTAG-TDI
| JTAG-TDI
| JTAG_TDI
| GPIO_AD_B0_09
| -
| JTAG TDI input line. Multifunction GPIO with 3.3V logic levels.
| JTAG TDI input line.
|-
|-
| 44
| 44
| GPIO-SNVS
| NC
| SNVS-TAMPER2
| -
| SNVS_TAMPER2
| -
| GPIO5_IO02
| Not internally connected.
| Tamper input (SNVS power domain) or GPIO 3.3V.
|-
|-
| 45
| 45
| GPIO
| GPIO
| GPIO-8
| GPIO-B1-09
| GPIO1_IO08
| GPIO_AD_B1_09
| PWM1_OUT
| Multifunction GPIO with 3.3V logic levels.
 
WDOG1_WDOG_B
 
SPDIF_OUT
 
CSI_VSYNC
 
USDHC2_VSELECT
 
CCM_PMIC_RDY
 
UART5_RTS_B
 
| Universal GPIO with 3.3V logic levels.
|-
|-
| 46
| 46
| JTAG
| JTAG
| JTAG-TMS
| JTAG-TMS
| JTAG_TMS
| GPIO_AD_B0_06
| -
| JTAG TMS input line. Multifunction GPIO with 3.3V logic levels.
| JTAG TMS input line.
|-
|-
| 47
| 47
| GPIO
| GPIO
| GPIO-4
| GPIO-B0-04
| GPIO1_IO04
| GPIO_AD_B0_04
| ENET1_REF_CLK1
| Multifunction GPIO with 3.3V logic levels.
 
Pin shared with BOOT-MODE0 line.
PWM3_OUT
 
USB_OTG1_PWR
 
USDHC1_RESET_B
 
ENET2_1588_EVENT0_IN
 
UART5_TX
 
| Universal GPIO with 3.3V logic levels.
|-
|-
| 48
| 48
| JTAG
| JTAG
| JTAG-nTRST
| JTAG-nTRST
| JTAG_TRST_B
| GPIO_AD_B0_11
| -
| JTAG nTRST input line. Multifunction GPIO with 3.3V logic levels.
| JTAG TRST input line (active L).
|-
|-
| 49
| 49
| GPIO
| GPIO
| GPIO-5
| GPIO-B1-11
| GPIO1_IO05
| GPIO_AD_B1_11
| ENET2_REF_CLK2
| Multifunction GPIO with 3.3V logic levels.
 
|-
PWM4_OUT
 
ANATOP_OTG2_ID
 
CSI_FIELD
 
USDHC1_VSELECT
 
ENET2_1588_EVENT0_OUT
 
UART5_RX
 
| Universal GPIO with 3.3V logic levels.
WLAN-ENABLE in SOM with WiFi/BT module
|-
| 50
| 50
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
Line 687: Line 596:
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
Line 694: Line 602:
| JTAG
| JTAG
| JTAG-TDO
| JTAG-TDO
| JTAG_TDO
| GPIO_AD_B0_10
| -
| JTAG TDO ouput line. Multifunction GPIO with 3.3V logic levels.
| JTAG TDO output line.
|-
|-
| 53
| 53
| GPIO
| GPIO
| GPIO-7
| ENET-MDC
| GPIO1_IO07
| GPIO_EMC_40
| ENET1_MDC
| Multifunction GPIO with 3.3V logic levels.
 
ENET2_MDC
 
USB_OTG_HOST_MODE
 
CSI_PIXCLK
 
USDHC2_CD_BCCM_STOP
 
UART1_RTS_B
 
| Universal GPIO with 3.3V logic levels.
|-
|-
| 54
| 54
| JTAG
| JTAG
| JTAG-TCK
| JTAG-TCK
| JTAG_TCK
| GPIO_AD_B0_07
| -
| JTAG TCK input line. Multifunction GPIO with 3.3V logic levels.
| JTAG TCK input line.
Connected to JTAG-TCK line (via separating resistor 10k).
|-
|-
| 55
| 55
| GPIO
| GPIO
| GPIO-3
| GPIO-B0-03
| GPIO1_IO03
| GPIO_AD_B0_03
| I2C1_SDA
| Multifunction GPIO with 3.3V logic levels.
 
GPT1_COMPARE3
 
USB_OTG2_OC
 
USDHC1_CD_B
 
CCM_DI0_EXT_CLK
 
SRC_TESTER_ACK
 
| Universal GPIO with 3.3V logic levels.
|-
|-
| 56
| 56
| GPIO
| GPIO
| GPIO-9
| GPIO-B1-14
| GPIO1_IO09
| GPIO_B1_14
| PWM2_OUT
| Multifunction GPIO with 3.3V logic levels.
 
|-
WDOG1_WDOG_ANY
| 57
 
SPDIF_IN
 
CSI_HSYNC
 
USDHC2_RESET_B
 
USDHC1_RESET_B
 
UART5_CTS_B
 
| Universal GPIO with 3.3V logic levels.
|-
| 57
| COM-GPIO
| COM-GPIO
| UART1-TXD
| UART1-TXD
| UART1_TX_DATA
| GPIO_AD_B0_12
| ENET1_RDATA02
| UART1 TxD outputor multifunction GPIO with 3.3V logic levels.
 
I2C3_SCL
 
CSI_DATA02
 
GPT1_COMPARE1
 
GPIO1_IO16
 
SPDIF_OUT
 
UART5_TX
 
| Default: UART1 TxD output or universal GPIO with 3.3V logic levels.
|-
|-
| 58
| 58
| GPIO
| GPIO
| GPIO-2
| GPIO-B0-02
| GPIO1_IO02
| GPIO_AD_B0_02
| I2C1_SCL
| Multifunction GPIO with 3.3V logic levels.
 
GPT1_COMPARE2
 
USB_OTG2_PWR
 
ENET1_REF_CLK_25M
 
USDHC1_WPS
 
DMA_EXT_EVENT00
 
SRC_ANY_PU_RESET
 
UART1_TX
 
| Universal GPIO with 3.3V logic levels.
|-
|-
| 59
| 59
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
Line 814: Line 650:
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
Line 820: Line 655:
| 61
| 61
| GPIO
| GPIO
| GPIO-6
| ENET-MDIO
| GPIO1_IO06
| GPIO_EMC_41
| ENET1_MDIO
| Multifunction GPIO with 3.3V logic levels.
 
|-
ENET2_MDIO
 
USB_OTG_PWR_WAKE
 
CSI_MCLK
 
USDHC2_WPCCM_WAIT
 
CCM_REF_EN_B
 
UART1_CTS_B
 
| Universal GPIO with 3.3V logic levels.
|-
| 62
| 62
| GPIO
| GPIO
| GPIO-1
| GPIO-B0-01
| GPIO1_IO01
| GPIO_AD_B0_01
| I2C2_SDA
| Multifunction GPIO with 3.3V logic levels.
 
GPT1_COMPARE1
 
USB_OTG1_OC
 
ENET2_REF_CLK2
 
MQS_LEFT
 
ENET1_1588_EVENT0_OUT
 
SRC_EARLY_RESET
 
WDOG1_WDOG_B
 
| Universal GPIO with 3.3V logic levels.
|-
|-
| 63
| 63
| COM-GPIO
| COM-GPIO
| UART1-RXD
| UART1-RXD
| UART1_RX_DATA
| GPIO_AD_B0_13
| ENET1_RDATA03
| UART1 RxD inputor multifunction GPIO with 3.3V logic levels.
 
I2C3_SDA
 
CSI_DATA03
 
GPT1_CLK
 
GPIO1_IO17
 
SPDIF_IN
 
UART5_RX
 
| Default: UART1 RxD input or universal GPIO with 3.3V logic levels.
|-
|-
| 64
| 64
| GPIO
| GPIO
| GPIO-0
| GPIO-B0-00
| GPIO1_IO00
| GPIO_AD_B0_00
| I2C2_SCL
| Multifunction GPIO with 3.3V logic levels.
 
|-
GPT1_CAPTURE1
| 65
 
| COM-GPIO
ANATOP_OTG1_ID
 
ENET1_REF_CLK1
 
MQS_RIGHT
 
ENET1_1588_EVENT0_IN
 
SRC_SYSTEM_RESET
 
WDOG3_WDOG_B
 
| Universal GPIO with 3.3V logic levels.
|-
| 65
| COM-GPIO
| UART2-TXD
| UART2-TXD
| UART2_TX_DATA
| GPIO_AD_B1_02
| ENET1_TDATA02
| UART2 TxD outputor multifunction GPIO with 3.3V logic levels.
 
I2C4_SCL
 
CSI_DATA06
 
GPT1_CAPTURE1
 
GPIO1_IO20
 
ECSPI3_SS0
 
| Default: UART2 TxD output or universal GPIO with 3.3V logic levels.
|-
|-
| 66
| 66
| COM-GPIO
| COM-GPIO
| UART1-CTS
| UART1-CTS
| UART1_CTS_B
| GPIO_AD_B0_14
| ENET1_RX_CLK
| UART1 CTS outputor multifunction GPIO with 3.3V logic levels.
 
USDHC1_WP
 
CSI_DATA04
 
ENET2_1588_EVENT1_IN
 
GPIO1_IO18
 
USDHC2_WP
 
UART5_CTS_B
 
| Default: UART1 CTS output or universal GPIO with 3.3V logic levels.
|-
|-
| 67
| 67
| COM-GPIO
| COM-GPIO
| UART2-RXD
| UART2-RXD
| UART2_RX_DATA
| GPIO_AD_B1_03
| ENET1_TDATA03
| UART2 RxD inputor multifunction GPIO with 3.3V logic levels.
 
|-
I2C4_SDA
| 68
 
| COM-GPIO
CSI_DATA07
 
GPT1_CAPTURE2
 
GPIO1_IO21
 
SJC_DONE
 
ECSPI3_SCLK
 
| Default: UART2 RxD input or universal GPIO with 3.3V logic levels.
|-
| 68
| COM-GPIO
| UART5-RXD
| UART5-RXD
| UART5_RX_DATA
| GPIO_B1_13
| ENET2_COL
| UART5 RxD inputor multifunction GPIO with 3.3V logic levels.
 
I2C2_SDA
 
CSI_DATA15
 
CSU_CSU_INT_DEB
 
GPIO1_IO31
 
ECSPI2_MISO
 
EPDC_PWRCTRL03
 
| Default: UART5 RxD input or universal GPIO with 3.3V logic levels.
|-
|-
| 69
| 69
| COM-GPIO
| COM-GPIO
| UART3-TXD
| UART3-TXD
| UART3_TX_DATA
| GPIO_AD_B1_06
| ENET2_RDATA02
| UART3 TxD inputor multifunction GPIO with 3.3V logic levels.
 
CSI_DATA01
 
UART2_CTS_B
 
GPIO1_IO24
 
SJC_JTAG_ACT
 
| Default: UART3 TxD input or universal GPIO with 3.3V logic levels.
|-
|-
| 70
| 70
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
Line 1,006: Line 716:
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
Line 1,013: Line 722:
| COM-GPIO
| COM-GPIO
| UART2-CTS
| UART2-CTS
| UART2_CTS_B
| GPIO_AD_B1_00
| ENET1_CRS
| UART2 CTS outputor multifunction GPIO with 3.3V logic levels.
 
|-
FLEXCAN2_TXCSI_DATA08
| 73
 
| COM-GPIO
GPT1_COMPARE2
 
GPIO1_IO22
 
SJC_DE_B
 
ECSPI3_MOSI
 
| Default: UART2 CTS output or universal GPIO with 3.3V logic levels.
|-
| 73
| COM-GPIO
| UART3-RXD
| UART3-RXD
| UART3_RX_DATA
| GPIO_AD_B1_07
| ENET2_RDATA03
| UART3 RxD inputor multifunction GPIO with 3.3V logic levels.
 
CSI_DATA00
 
UART2_RTS_B
 
GPIO1_IO25
 
EPIT1_OUT
 
| Default: UART3 RxD input or universal GPIO with 3.3V logic levels.
|-
|-
| 74
| 74
| COM-GPIO
| COM-GPIO
| UART1-RTS
| UART1-RTS
| UART1_RTS_B
| GPIO_AD_B0_15
| ENET1_TX_ER
| UART1 RTS inputor multifunction GPIO with 3.3V logic levels.
 
USDHC1_CD_BCSI_DATA05
 
ENET2_1588_EVENT1_OUT
 
GPIO1_IO19
 
USDHC2_CD_B
 
UART5_RTS_B
 
| Default: UART1 RTS input or universal GPIO with 3.3V logic levels.
|-
|-
| 75
| 75
| NC
| -
| -
| Not internally connected.
|-
| 76
| COM-GPIO
| COM-GPIO
| UART4-TXD
| UART3-CTS
| UART4_TX_DATA
| GPIO_AD_B1_04
| ENET2_TDATA02
| UART3 CTS outputor multifunction GPIO with 3.3V logic levels.
 
|-
I2C1_SCL
 
CSI_DATA12
 
CSU_CSU_ALARM_AUT02
 
GPIO1_IO28
 
ECSPI2_SCLK
 
| Default: UART4 TxD output or universal GPIO with 3.3V logic levels.
|-
| 76
| COM-GPIO
| UART3-CTS
| UART3_CTS_B
| ENET2_RX_CLK
 
FLEXCAN1_TX
 
CSI_DATA10
 
ENET1_1588_EVENT1_IN
 
GPIO1_IO26
 
EPIT2_OUT
 
| Default: UART3 CTS output or universal GPIO with 3.3V logic levels.
|-
| 77
| 77
| COM-GPIO
| NC
| UART4-RXD
| -
| UART4_RX_DATA
| -
| ENET2_TDATA03
| Not internally connected.
 
I2C1_SDA
 
CSI_DATA13
 
CSU_CSU_ALARM_AUT01
 
GPIO1_IO29
 
ECSPI2_SS0
 
EPDC_PWRCTRL01
 
| Default: UART4 RxD input or universal GPIO with 3.3V logic levels.
|-
|-
| 78
| 78
| COM-GPIO
| COM-GPIO
| UART2-RTS
| UART2-RTS
| UART2_RTS_B
| GPIO_AD_B1_01
| ENET1_COL
| UART2 RTS inputor multifunction GPIO with 3.3V logic levels.
 
|-
FLEXCAN2_RX
 
CSI_DATA09
 
GPT1_COMPARE3
 
GPIO1_IO23
 
SJC_FAIL
 
ECSPI3_MISO
 
| Default: UART2 RTS input or universal GPIO with 3.3V logic levels.
|-
| 79
| 79
| COM-GPIO
| COM-GPIO
| UART5-TXD
| UART5-TXD
| UART5_TX_DATA
| GPIO_B1_12
| GPIO1_IO30
| UART5 TxD outputor multifunction GPIO with 3.3V logic levels.
 
ECSPI2_MOSI
 
EPDC_PWRCTRL02
 
ENET2_CRS
 
I2C2_SCL
 
CSI_DATA14
 
CSU_CSU_ALARM_AUT00
 
| Default: UART5 TxD output or universal GPIO with 3.3V logic levels.
|-
|-
| 80
| 80
| COM-GPIO
| COM-GPIO
| UART3-RTS
| UART3-RTS
| UART3_RTS_B
| GPIO_AD_B1_05
| ENET2_TX_ER
| UART3 RTS inputor multifunction GPIO with 3.3V logic levels.
 
FLEXCAN1_RX
 
CSI_DATA11
 
ENET1_1588_EVENT1_OUT
 
GPIO1_IO27
 
WDOG1_WDOG_B
 
| Default: UART3 RTS input or universal GPIO with 3.3V logic levels.
|-
|-
| 81
| 81
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
Line 1,186: Line 782:
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
Line 1,194: Line 789:
| -
| -
| -
| -
| -
| Not internally connected.
| -
|-
|-
| 84
| 84
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
Line 1,207: Line 800:
| Power
| Power
| +3.3VOUT
| +3.3VOUT
| -
| -
| -
| +3.3V generated by SOM's LDO.
| +3.3V generated by SOM's LDO.
Line 1,215: Line 807:
| -
| -
| -
| -
| -
| Not internally connected.
| -
|-
|-
| 87
| 87
| Power
| Power
| +3.3VOUT
| +3.3VOUT
| -
| -
| -
| +3.3V generated by SOM's LDO.
| +3.3V generated by SOM's LDO.
Line 1,228: Line 818:
| Power
| Power
| +3.3VOUT
| +3.3VOUT
| -
| -
| -
| +3.3V generated by SOM's LDO.
| +3.3V generated by SOM's LDO.
Line 1,235: Line 824:
| Power
| Power
| +3.3VOUT
| +3.3VOUT
| -
| -
| -
| +3.3V generated by SOM's LDO.
| +3.3V generated by SOM's LDO.
Line 1,242: Line 830:
| Power
| Power
| +3.3VOUT
| +3.3VOUT
| -
| -
| -
| +3.3V generated by SOM's LDO.
| +3.3V generated by SOM's LDO.
Line 1,249: Line 836:
| Power
| Power
| +3.3VOUT
| +3.3VOUT
| -
| -
| -
| +3.3V generated by SOM's LDO.
| +3.3V generated by SOM's LDO.
Line 1,256: Line 842:
| Power
| Power
| +3.3VOUT
| +3.3VOUT
| -
| -
| -
| +3.3V generated by SOM's LDO.
| +3.3V generated by SOM's LDO.
Line 1,263: Line 848:
| Power
| Power
| +3.3VOUT
| +3.3VOUT
| -
| -
| -
| +3.3V generated by SOM's LDO.
| +3.3V generated by SOM's LDO.
Line 1,271: Line 855:
| -
| -
| -
| -
| -
| Not internally connected.
| -
|-
|-
| 95
| 95
Line 1,278: Line 861:
| -
| -
| -
| -
| -
| Not internally connected.
| -
|-
|-
| 96
| 96
| Power
| Power
| +5VIN
| +5VIN
| -
| -
| -
| +4.0-5.5V input power supply.
| +4.0-5.5V input power supply.
Line 1,291: Line 872:
| Ethernet
| Ethernet
| ENET1-RXD0
| ENET1-RXD0
| ENET1_RX_DATA0
| GPIO_B1_04
| UART4_RTS_B
| Ethernet MAC1-PHY interface signal or multifunction GPIO with 3.3V logic levels.
 
PWM1_OUT
 
CSI_DATA16
 
FLEXCAN1_TX
 
GPIO2_IO00
 
KPP_ROW00
 
USDHC1_LCTL
 
EPDC_SDCE04
 
| Ethernet MAC1-PHY interface signal or universal GPIO with 3.3V logic levels.
|-
|-
| 98
| 98
| Power
| Power
| +5VIN
| +5VIN
| -
| -
| -
| +4.0-5.5V input power supply.
| +4.0-5.5V input power supply.
Line 1,320: Line 884:
| Ethernet
| Ethernet
| ENET1-RXD1
| ENET1-RXD1
| ENET1_RX_DATA1
| GPIO_B1_05
| UART4_CTS_B
| Ethernet MAC1-PHY interface signal or multifunction GPIO with 3.3V logic levels.
 
|-
PWM2_OUT
| 100
 
CSI_DATA17
 
FLEXCAN1_RX
 
GPIO2_IO01
 
KPP_COL00
 
USDHC2_LCTL
 
EPDC_SDCE05
 
| Ethernet MAC1-PHY interface signal or universal GPIO with 3.3V logic levels.
|-
| 100
| Power
| Power
| +5VIN
| +5VIN
| -
| -
| -
| +4.0-5.5V input power supply.
| +4.0-5.5V input power supply.
Line 1,349: Line 896:
| Ethernet
| Ethernet
| ENET1-CRS-DV
| ENET1-CRS-DV
| ENET1_RX_EN
| GPIO_B1_06
| UART5_RTS_B
| Ethernet MAC1-PHY interface signal or multifunction GPIO with 3.3V logic levels.
 
CSI_DATA18
 
FLEXCAN2_TX
 
GPIO2_IO02
 
KPP_ROW01
 
USDHC1_VSELECT
 
EPDC_SDCE06
 
| Ethernet MAC1-PHY interface signal or universal GPIO with 3.3V logic levels.
|-
|-
| 102
| 102
| Power
| Power
| +5VIN
| +5VIN
|
|  
|  
| +4.0-5.5V input power supply.
| +4.0-5.5V input power supply.
Line 1,376: Line 908:
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
Line 1,383: Line 914:
| Power
| Power
| +5VIN
| +5VIN
|
|  
|  
| +4.0-5.5V input power supply.
| +4.0-5.5V input power supply.
|-
|-
| 105
| 105
| Ethernet
| NC
| ENET2-TX-CLK
| -
| ENET2_TX_CLK
| -
| UART8_CTS_B
| Not internally connected.
 
|-
ECSPI4_MISO
 
ENET2_REF_CLK2
 
GPIO2_IO14
 
KPP_ROW07
 
ANATOP_OTG2_ID
 
EPDC_SDDO14
 
| Ethernet MAC2-PHY interface signal or universal GPIO with 3.3V logic levels.
10R resistor connected in series.
|-
| 106
| 106
| Power
| Power
| +5VIN
| +5VIN
|
|  
|  
| +4.0-5.5V input power supply.
| +4.0-5.5V input power supply.
Line 1,418: Line 932:
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
Line 1,425: Line 938:
| Power
| Power
| +5VIN
| +5VIN
|
|  
|  
| +4.0-5.5V input power supply.
| +4.0-5.5V input power supply.
|-
|-
| 109
| 109
| Ethernet
| NC
| ENET2-RXER
| -
| ENET2_RX_ER
| -
| UART8_RTS_B
| Not internally connected.
 
ECSPI4_SS0
 
EIM_ADDR25
 
GPIO2_IO15
 
KPP_COL07
 
WDOG1_WDOG_ANY
 
EPDC_SDDO15
 
| Ethernet MAC2-PHY interface signal or universal GPIO with 3.3V logic levels.
Connected to WD_G-B line.
|-
|-
| 110
| 110
| Power
| Power
| +5VIN
| +5VIN
| -
| -
| -
| +4.0-5.5V input power supply.
| +4.0-5.5V input power supply.
Line 1,460: Line 956:
| Ethernet
| Ethernet
| ENET2-RXD0
| ENET2-RXD0
| ENET2_RX_DATA0
| GPIO_AD_B1_14
| UART6_TX
| Ethernet MAC2-PHY interface signal or multifunction GPIO with 3.3V logic levels.
 
I2C3_SCL
 
ENET1_MDIO
 
GPIO2_IO08
 
KPP_ROW04
 
USB_OTG1_PWR
 
EPDC_SDDO08
 
| Ethernet MAC2-PHY interface signal or universal GPIO with 3.3V logic levels.
|-
|-
| 112
| 112
| Power
| Power
| +5VIN
| +5VIN
| -
| -
| -
| +4.0-5.5V input power supply.
| +4.0-5.5V input power supply.
|-
|-
| 113
| 113
| Ethernet
| NC
| ENET2-RXD1
| -
| ENET2_RX_DATA1
| -
| UART6_RX
| Not internally connected.
 
I2C3_SDA
 
ENET1_MDC
 
GPIO2_IO09
 
KPP_COL04
 
USB_OTG1_OCE
 
PDC_SDDO09
 
| Ethernet MAC2-PHY interface signal or universal GPIO with 3.3V logic levels.
|-
|-
| 114
| 114
| Ethernet
| Ethernet
| ENET1-TXEN
| ENET1-TXEN
| ENET1_TX_EN
| GPIO_B1_09
| UART6_RTS_B
| Ethernet MAC1-PHY interface signal or multifunction GPIO with 3.3V logic levels.
 
PWM6_OUT
 
CSI_DATA21
 
ENET2_MDC
 
GPIO2_IO05
 
KPP_COL02
 
WDOG2_WDOG_RST_B_DEB
 
EPDC_SDCE09
 
| Ethernet MAC1-PHY interface signal or universal GPIO with 3.3V logic levels.
|-
|-
| 115
| 115
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
Line 1,536: Line 986:
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
Line 1,543: Line 992:
| Ethernet
| Ethernet
| ENET2-CRS-DV
| ENET2-CRS-DV
| ENET2_RX_EN
| GPIO_AD_B1_15
| UART7_TX
| Ethernet MAC2-PHY interface signal or multifunction GPIO with 3.3V logic levels.
 
|-
I2C4_SCL
| 118
 
| Ethernet
EIM_ADDR26
 
GPIO2_IO10
 
KPP_ROW05
 
ENET1_REF_CLK_25M
 
EPDC_SDDO10
 
| Ethernet MAC2-PHY interface signal or universal GPIO with 3.3V logic levels.
|-
| 118
| Ethernet
| ENET1-TX-CLK
| ENET1-TX-CLK
| ENET1_TX_CLK
| GPIO_B1_10
| UART7_CTS_B
| Ethernet MAC1-PHY interface signal or multifunction GPIO with 3.3V logic levels.In series is connected 10R resistor.
 
PWM7_OUT
 
CSI_DATA22
 
ENET1_REF_CLK1
 
GPIO2_IO06
 
KPP_ROW03
 
GPT1_CLK
 
EPDC_SDOED
 
| Ethernet MAC1-PHY interface signal or universal GPIO with 3.3V logic levels.
10R resistor connected in series.
|-
|-
| 119
| 119
| Ethernet
| Ethernet
| ENET2-TXD1
| ENET2-TXD1
| ENET2_TX_DATA1
| GPIO_AD_B1_13
| UART8_TX
| Ethernet MAC2-PHY interface signal or multifunction GPIO with 3.3V logic levels.
 
ECSPI4_SCLK
 
EIM_EB_B03
 
GPIO2_IO12
 
KPP_ROW06
 
USB_OTG2_PWR
 
EPDC_SDDO12
 
| Ethernet MAC2-PHY interface signal or universal GPIO with 3.3V logic levels.
|-
|-
| 120
| 120
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
Line 1,613: Line 1,016:
| Ethernet
| Ethernet
| ENET2-TXEN
| ENET2-TXEN
| ENET2_TX_EN
| GPIO_AD_B1_12
| UART8_RX
| Ethernet MAC2-PHY interface signal or multifunction GPIO with 3.3V logic levels.
 
|-
ECSPI4_MOSI
| 122
 
EIM_ACLK_FREERUN
 
GPIO2_IO13
 
KPP_COL06
 
USB_OTG2_OC
 
EPDC_SDDO13
 
|  
|-
| 122
| Ethernet
| Ethernet
| ENET1-TXD0
| ENET1-TXD0
| ENET1_TX_DATA0
| GPIO_B1_07
| UART5_CTS_B
| Ethernet MAC1-PHY interface signal or multifunction GPIO with 3.3V logic levels.
 
CSI_DATA19
 
FLEXCAN2_RX
 
GPIO2_IO03
 
KPP_COL01
 
USDHC2_VSELECT
 
EPDC_SDCE07
 
| Ethernet MAC1-PHY interface signal or universal GPIO with 3.3V logic levels.
|-
|-
| 123
| 123
| Ethernet
| Ethernet
| ENET2-TXD0
| ENET2-TXD0
| ENET2_TX_DATA0
| GPIO_B1_15
| UART7_RX
| Ethernet MAC2-PHY interface signal or multifunction GPIO with 3.3V logic levels.
 
I2C4_SDA
 
EIM_EB_B02
 
GPIO2_IO11
 
KPP_COL05
 
EPDC_SDDO11
 
| Ethernet MAC2-PHY interface signal or universal GPIO with 3.3V logic levels.
|-
|-
| 124
| 124
| Ethernet
| Ethernet
| ENET1-TXD1
| ENET1-TXD1
| ENET1_TX_DATA1
| GPIO_B1_08
| UART6_CTS_B
| Ethernet MAC1-PHY interface signal or multifunction GPIO with 3.3V logic levels.
 
|-
PWM5_OUT
| 125
 
| Power
CSI_DATA20
 
ENET2_MDIO
 
GPIO2_IO04
 
KPP_ROW02
 
WDOG1_WDOG_RST_B_DEB
 
EPDC_SDCE08
 
| Ethernet MAC1-PHY interface signal or universal GPIO with 3.3V logic levels.
|-
| 125
| Power
| GND
| GND
| -
| -
| -
| -
| -
Line 1,700: Line 1,046:
| Ethernet
| Ethernet
| ENET1-RXER
| ENET1-RXER
| ENET1_RX_ER
| GPIO_B1_11
| UART7_RTS_B
| Ethernet MAC1-PHY interface signal or multifunction GPIO with 3.3V logic levels.
 
PWM8_OUT
 
CSI_DATA23
 
EIM_CRE
 
GPIO2_IO07
 
KPP_COL03
 
GPT1_CAPTURE2
 
EPDC_SDOEZ
 
| Ethernet MAC1-PHY interface signal or universal GPIO with 3.3V logic levels.
|-
|-
| 127
| 127
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
Line 1,729: Line 1,058:
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
Line 1,736: Line 1,064:
| LCD
| LCD
| LCD-DATA21
| LCD-DATA21
| LCD_DATA21
| GPIO_B1_01
| UART8_RX
| LCD interface signal or multifunction GPIO with 3.3V logic levels.
 
|-
ECSPI1_SS0
| 130
 
| Power
CSI_DATA13
| GND
 
EIM_DATA13
 
GPIO3_IO26
 
SRC_BT_CFG29
 
USDHC2_DATA1
 
EPDC_SDCE01
 
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
| 130
| Power
| GND
| -
| -
| -
| -
| -
Line 1,765: Line 1,076:
| LCD
| LCD
| LCD-DATA22
| LCD-DATA22
| LCD_DATA22
| GPIO_B1_02
| MQS_RIGHT
| LCD interface signal or multifunction GPIO with 3.3V logic levels.
 
ECSPI1_MOSI
 
CSI_DATA14
 
EIM_DATA14
 
GPIO3_IO27
 
SRC_BT_CFG30
 
USDHC2_DATA2
 
USDHC2_DATA2
 
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
| 132
| 132
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
Line 1,794: Line 1,088:
| LCD
| LCD
| LCD-DATA17
| LCD-DATA17
| LCD_DATA17
| GND
| UART7_RX
| Internally connected to GND.
 
CSI_DATA00
 
EIM_DATA09
 
GPIO3_IO22
 
SRC_BT_CFG25
 
USDHC2_DATA7
 
EPDC_GDSP
 
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
| 134
| 134
| LCD
| LCD
| LCD-DATA23
| LCD-DATA23
| LCD_DATA23
| GPIO_B1_03
| MQS_LEFT
| LCD interface signal or multifunction GPIO with 3.3V logic levels.
 
ECSPI1_MISO
 
CSI_DATA15
 
EIM_DATA15
 
GPIO3_IO28
 
SRC_BT_CFG31
 
USDHC2_DATA3
 
EPDC_SDCE03
 
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
| 135
| 135
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
Line 1,843: Line 1,106:
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
Line 1,849: Line 1,111:
| 137
| 137
| LCD
| LCD
| LCD-DATA18
| LCD_DATA18
| LCD_DATA18
| PWM5_OUT
| GND
 
| Internally connected to GND.
CA7_MX6ULL_EVENTO
 
CSI_DATA10
 
EIM_DATA10
 
GPIO3_IO23
 
SRC_BT_CFG26
 
USDHC2_CMD
 
EPDC_BDR01
 
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
| 138
| 138
| LCD
| LCD
| LCD-DATA19
| LCD-DATA19
| LCD_DATA19
| GPIO_B0_15
| PWM6_OUT
| LCD interface signal or multifunction GPIO with 3.3V logic levels.
 
By default this pin is pulled-down with 10k resistor.
WDOG1_WDOG_ANY
 
CSI_DATA11
 
EIM_DATA11
 
GPIO3_IO24
 
SRC_BT_CFG27
 
USDHC2_CLK
 
EPDC_VCOM00
 
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
| 139
| 139
| LCD
| LCD
| LCD-DATA13
| LCD-DATA13
| LCD_DATA13
| GPIO_B0_12
| SAI3_TX_BCLK
| LCD interface signal or multifunction GPIO with 3.3V logic levels.
 
By default this pin is pulled-down with 10k resistor.
CSI_DATA21
 
EIM_DATA05
 
GPIO3_IO18
 
SRC_BT_CFG13
 
USDHC2_RESET_B
 
EPDC_BDR00
 
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
| 140
| 140
| LCD
| LCD
| LCD-DATA20
| LCD-DATA20
| LCD_DATA20
| GPIO_B1_00
| UART8_TX
| LCD interface signal or multifunction GPIO with 3.3V logic levels.
 
ECSPI1_SCLK
 
CSI_DATA12
 
EIM_DATA12
 
GPIO3_IO25
 
SRC_BT_CFG28
 
USDHC2_DATA0
 
EPDC_VCOM01
 
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
| 141
| 141
| LCD
| LCD
| LCD-DATA14
| LCD-DATA14
| LCD_DATA14
| GPIO_B0_13
| SAI3_RX_DATA
| LCD interface signal or multifunction GPIO with 3.3V logic levels.
 
By default this pin is pulled-down with 10k resistor.
CSI_DATA22
 
EIM_DATA06
 
GPIO3_IO19
 
SRC_BT_CFG14
 
USDHC2_DATA4
 
EPDC_SDSHR
 
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
| 142
| 142
| LCD
| LCD
| LCD-DATA15
| LCD-DATA15
| LCD_DATA15
| GPIO_B0_14
| SAI3_TX_DATA
| LCD interface signal or multifunction GPIO with 3.3V logic levels.
 
By default this pin is pulled-down with 10k resistor.
CSI_DATA23
|-
 
| 143
EIM_DATA07
| LCD
 
| LCD_DATA8
GPIO3_IO20
| GND
 
| Internally connected to GND.
SRC_BT_CFG15
 
USDHC2_DATA5
 
EPDC_GDRL
 
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
| 143
| LCD
| LCD-DATA8
| LCD_DATA08
| SPDIF_IN
 
CSI_DATA16
 
EIM_DATA00
 
GPIO3_IO13
 
SRC_BT_CFG08
 
FLEXCAN1_TX
 
EPDC_PWRIRQ
 
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
| 144
| 144
| LCD
| LCD
| LCD-DATA16
| LCD-DATA16
| LCD_DATA16
| GND
| UART7_TX
| Internally connected to GND.
 
CSI_DATA01
 
EIM_DATA08
 
GPIO3_IO21
 
SRC_BT_CFG24
 
USDHC2_DATA6
 
EPDC_GDCLK
 
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
| 145
| 145
| LCD
| LCD
| LCD-DATA9
| LCD-DATA9
| LCD_DATA09
| GND
| SAI3_MCLK
| Internally connected to GND.
 
|-
CSI_DATA17
 
EIM_DATA01
 
GPIO3_IO14
 
SRC_BT_CFG09
 
FLEXCAN1_RX
 
EPDC_PWRWAKE
 
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
| 146
| 146
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
Line 2,043: Line 1,176:
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
Line 2,050: Line 1,182:
| LCD
| LCD
| LCD-DATA11
| LCD-DATA11
| LCD_DATA11
| GPIO_B0_10
| SAI3_RX_BCLK
| LCD interface signal or multifunction GPIO with 3.3V logic levels.
 
By default this pin is pulled-down with 10k resistor.
CSI_DATA19
 
EIM_DATA03
 
GPIO3_IO16
 
SRC_BT_CFG11
 
FLEXCAN2_RX
 
EPDC_PWRSTAT
 
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
| 149
| 149
| LCD
| LCD
| LCD-DATA5
| LCD-DATA5
| LCD_DATA05
| GPIO_B0_06
| UART8_RTS_B
| LCD interface signal or multifunction GPIO with 3.3V logic levels.
 
By default this pin is pulled-down with 10k resistor.
ENET2_1588_EVENT2_OUT
 
SPDIF_OUT
 
GPIO3_IO10
 
SRC_BT_CFG05
 
ECSPI1_SS1
 
EPDC_SDDO05
 
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
| 150
| 150
| LCD
| LCD
| LCD-DATA12
| LCD-DATA12
| LCD_DATA12
| GPIO_B0_11
| SAI3_TX_SYNC
| LCD interface signal or multifunction GPIO with 3.3V logic levels.
 
By default this pin is pulled-down with 10k resistor.
CSI_DATA20
|-
 
| 151
EIM_DATA04
 
GPIO3_IO17
 
SRC_BT_CFG12
 
ECSPI1_RDY
 
EPDC_PWRCTRL00
 
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
| 151
| LCD
| LCD
| LCD-DATA6
| LCD-DATA6
| LCD_DATA06
| GPIO_B0_07
| UART7_CTS_B
| LCD interface signal or multifunction GPIO with 3.3V logic levels.
 
By default this pin is pulled-down with 10k resistor.
ENET2_1588_EVENT3_IN
 
SPDIF_LOCK
 
GPIO3_IO11
 
SRC_BT_CFG06
 
ECSPI1_SS2
 
EPDC_SDDO06
 
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
| 152
| 152
| LCD
| LCD
| LCD-DATA10
| LCD-DATA10
| LCD_DATA10
| GPIO_B0_09
| SAI3_RX_SYNC
| LCD interface signal or multifunction GPIO with 3.3V logic levels.
 
By default this pin is pulled-down with 10k resistor.
CSI_DATA18
 
EIM_DATA02
 
GPIO3_IO15
 
SRC_BT_CFG10
 
FLEXCAN2_TX
 
EPDC_PWRCOM
 
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
| 153
| 153
| LCD
| LCD
| LCD-DATA0
| LCD-DATA0
| LCD_DATA00
| GND
| PWM1_OUT
| Internally connected to GND.
 
|-
ENET1_1588_EVENT2_IN
| 154
 
I2C3_SDA
 
GPIO3_IO05
 
SRC_BT_CFG00
 
SAI1_MCLK
 
EPDC_SDDO00
 
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
| 154
| LCD
| LCD
| LCD-DATA3
| LCD-DATA3
| LCD_DATA03
| GPIO_B0_04
| PWM4_OUT
| LCD interface signal or multifunction GPIO with 3.3V logic levels.
 
By default this pin is pulled-down with 10k resistor.
ENET1_1588_EVENT3_OUT
 
I2C4_SCL
 
GPIO3_IO08
 
SRC_BT_CFG03
 
SAI1_RX_DATA
 
EPDC_SDDO03
 
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
| 155
| 155
| LCD
| LCD
| LCD-DATA1
| LCD-DATA1
| LCD_DATA01
| GND
| PWM2_OUT
| Internally connected to GND.
 
ENET1_1588_EVENT2_OUT
 
I2C3_SCL
 
GPIO3_IO06
 
SRC_BT_CFG01
 
SAI1_TX_SYNC
 
EPDC_SDDO01
 
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
| 156
| 156
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
Line 2,217: Line 1,242:
| LCD
| LCD
| LCD-RESET
| LCD-RESET
| LCD_RESET
| GPIO_AD_B1_08
| LCDIF_CS
| LCD interface signal or multifunction GPIO with 3.3V logic levels.
 
|-
CA7_MX6ULL_EVENT
| 158
 
| LCD
ISAI3_TX_DATA
 
WDOG1_WDOG_ANY
 
GPIO3_IO04
 
ECSPI2_SS3
 
EPDC_GDOE
 
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
| 158
| LCD
| LCD-DATA4
| LCD-DATA4
| LCD_DATA04
| GPIO_B0_05
| UART8_CTS_B
| LCD interface signal or multifunction GPIO with 3.3V logic levels.
 
By default this pin is pulled-down with 10k resistor.
ENET2_1588_EVENT2_IN
 
SPDIF_SR_CLK
 
GPIO3_IO09
 
SRC_BT_CFG04
 
SAI1_TX_DATA
 
EPDC_SDDO04
 
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
| 159
| 159
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
Line 2,264: Line 1,261:
| LCD
| LCD
| LCD-HSYNC
| LCD-HSYNC
| LCD_HSYNC
| GPIO_B0_02
| LCDIF_RS
| LCD interface signal or multifunction GPIO with 3.3V logic levels.
 
UART4_CTS_B
 
SAI3_TX_BCLK
 
WDOG3_WDOG_RST_B_DEB
 
GPIO3_IO02
 
ECSPI2_SS1
 
EPDC_SDOE
 
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
| 161
| 161
| LCD
| LCD
| LCD-CLK
| LCD-CLK
| LCD_CLK
| GPIO_B0_00
| LCDIF_WR_RWN
| LCD interface signal or multifunction GPIO with 3.3V logic levels.
 
|-
UART4_TX
| 162
 
SAI3_MCLK
 
EIM_CS2_B
 
GPIO3_IO00
 
WDOG1_WDOG_RST_B_DEB
 
EPDC_SDCLK
 
| LCD interface signal or universal GPIO with 3.3V logic levels.
10R resistor connected in series.
|-
| 162
| LCD
| LCD
| LCD-VSYNC
| LCD-VSYNC
| LCD_VSYNC
| GPIO_B0_03
| LCDIF_BUSY
| LCD interface signal or multifunction GPIO with 3.3V logic levels.
 
UART4_RTS_B
 
SAI3_RX_DATA
 
WDOG2_WDOG_B
 
GPIO3_IO03
 
ECSPI2_SS2
 
EPDC_SDCE00
 
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
| 163
| 163
| LCD
| LCD
| LCD-ENABLE
| LCD-ENABLE
| LCD_ENABLE
| GPIO_B0_01
| LCDIF_RD_E
| LCD interface signal or multifunction GPIO with 3.3V logic levels.
 
UART4_RX
 
SAI3_TX_SYNC
 
EIM_CS3_B
 
GPIO3_IO01
 
ECSPI2_RDY
 
EPDC_SDLE
 
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
| 164
| 164
| LCD
| LCD
| LCD-DATA2
| LCD-DATA2
| LCD_DATA02
| GND
| PWM3_OUT
| Internally connected to GND.
 
|-
ENET1_1588_EVENT3_IN
| 165
 
I2C4_SDA
 
GPIO3_IO07
 
SRC_BT_CFG02
 
SAI1_TX_BCLK
 
EPDC_SDDO02
 
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
| 165
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
Line 2,372: Line 1,297:
| LCD
| LCD
| LCD-DATA7
| LCD-DATA7
| LCD_DATA07
| GPIO_B0_08
| UART7_RTS_B
| LCD interface signal or multifunction GPIO with 3.3V logic levels.
 
By default this pin is pulled-down with 10k resistor.
ENET2_1588_EVENT3_OUT
 
SPDIF_EXT_CLK
 
GPIO3_IO12
 
SRC_BT_CFG07
 
ECSPI1_SS3
 
EPDC_SDDO07
 
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
| 167
| 167
| SDIO
| SDIO
| SDIO1-D0
| SDIO1-D0
| SD1_DATA0
| GPIO_SD_B0_02
| GPT2_COMPARE3
| SDIO interface signal or multifunction GPIO with 3.3V logic levels.
 
SAI2_TX_SYNC
 
FLEXCAN1_TX
 
EIM_ADDR21
 
GPIO2_IO18
 
ANATOP_OTG1_ID
 
| SDIO interface signal or universal GPIO with 3.3V logic levels.
|-
|-
| 168
| 168
Line 2,411: Line 1,311:
| -
| -
| -
| -
| -
| Not internally connected.
| -
|-
|-
| 169
| 169
| SDIO
| SDIO
| SDIO1-D3
| SDIO1-D3
| SD1_DATA3
| GPIO_SD_B0_05
| GPT2_CAPTURE2
| SDIO interface signal or multifunction GPIO with 3.3V logic levels.
 
|-
SAI2_TX_DATA
| 170
 
| NC
FLEXCAN2_RX
| -
 
EIM_ADDR24
 
GPIO2_IO21
 
CCM_CLKO2
 
ANATOP_OTG2_ID
 
| SDIO interface signal or universal GPIO with 3.3V logic levels.
|-
| NC
| -
| -
| -
| -
| -
| Not internally connected.
|-
|-
| 171
| 171
| SDIO
| SDIO
| SDIO1-D1
| SDIO1-D1
| SD1_DATA1
| GPIO_SD_B0_03
| GPT2_CLK
| SDIO interface signal or multifunction GPIO with 3.3V logic levels.
 
SAI2_TX_BCLK
 
FLEXCAN1_RX
 
EIM_ADDR22
 
GPIO2_IO19
 
USB_OTG2_PWR
 
| SDIO interface signal or universal GPIO with 3.3V logic levels.
|-
|-
| 172
| 172
Line 2,462: Line 1,335:
| -
| -
| -
| -
| -
| Not internally connected.
| -
|-
|-
| 173
| 173
| SDIO
| SDIO
| SDIO1-CMD
| SDIO1-CMD
| SD1_CMD
| GPIO_SD_B0_00
| GPT2_COMPARE1
| SDIO interface signal or multifunction GPIO with 3.3V logic levels.
 
SAI2_RX_SYNC
 
SPDIF_OUT
 
EIM_ADDR19
 
GPIO2_IO16
 
SDMA_EXT_EVENT00
 
USB_OTG1_PWR
 
| SDIO interface signal or universal GPIO with 3.3V logic levels.
|-
|-
| 174
| 174
Line 2,489: Line 1,347:
| -
| -
| -
| -
| -
| Not internally connected.
| -
|-
|-
| 175
| 175
| SDIO
| SDIO
| SDIO1-D2
| SDIO1-D2
| SD1_DATA2
| GPIO_SD_B0_04
| GPT2_CAPTURE1
| SDIO interface signal or multifunction GPIO with 3.3V logic levels.
 
SAI2_RX_DATA
 
FLEXCAN2_TX
 
EIM_ADDR23
 
GPIO2_IO20
 
CCM_CLKO1
 
USB_OTG2_OC
 
| SDIO interface signal or universal GPIO with 3.3V logic levels.
|-
|-
| 176
| 176
Line 2,516: Line 1,359:
| -
| -
| -
| -
| -
| Not internally connected.
| -
|-
|-
| 177
| 177
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
Line 2,530: Line 1,371:
| -
| -
| -
| -
| -
| Not internally connected.
| -
|-
|-
| 179
| 179
| SDIO
| SDIO
| SDIO1-CLK
| SDIO1-CLK
| SD1_CLK
| GPIO_SD_B0_01
| GPT2_COMPARE2
| SDIO interface signal or multifunction GPIO with 3.3V logic levels.
 
SAI2_MCLK
 
SPDIF_IN
 
EIM_ADDR20
 
GPIO2_IO17
 
USB_OTG1_OC
 
| SDIO interface signal or universal GPIO with 3.3V logic levels.
|-
|-
| 180
| 180
Line 2,555: Line 1,383:
| -
| -
| -
| -
| -
| Not internally connected.
| -
|-
|-
| 181
| 181
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
Line 2,569: Line 1,395:
| -
| -
| -
| -
| -
| Not internally connected.
| -
|-
|-
| 183
| 183
Line 2,576: Line 1,401:
| -
| -
| -
| -
| -
| Not internally connected.
| -
|-
|-
| 184
| 184
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
Line 2,589: Line 1,412:
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
Line 2,595: Line 1,417:
| 186
| 186
| NC
| NC
|
| -
| -
| -
| Not internally connected.
| -
| -
|-
|-
| 187
| 187
| NC
| NC
| -
|  
| -
| -
| -
| -
| Not internally connected.
|-
|-
| 188
| 188
Line 2,611: Line 1,431:
| -
| -
| -
| -
| -
| Not internally connected.
| -
|-
|-
| 189
| 189
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
Line 2,625: Line 1,443:
| -
| -
| -
| -
| -
| Not internally connected.
| -
|-
|-
| 191
| 191
Line 2,632: Line 1,449:
| -
| -
| -
| -
| -
| Not internally connected.
| -
|-
|-
| 192
| 192
Line 2,639: Line 1,455:
| -
| -
| -
| -
| -
| Not internally connected.
| -
|-
|-
| 193
| 193
Line 2,646: Line 1,461:
| -
| -
| -
| -
| -
| Not internally connected.
| -
|-
|-
| 194
| 194
Line 2,653: Line 1,467:
| -
| -
| -
| -
| -
| Not internally connected.
| -
|-
|-
| 195
| 195
Line 2,660: Line 1,473:
| -
| -
| -
| -
| -
| Not internally connected.
| -
|-
|-
| 196
| 196
Line 2,667: Line 1,479:
| -
| -
| -
| -
| -
| Not internally connected.
| -
|-
|-
| 197
| 197
Line 2,674: Line 1,485:
| -
| -
| -
| -
| -
| Not internally connected.
| -
|-
|-
| 198
| 198
Line 2,681: Line 1,491:
| -
| -
| -
| -
| -
| Not internally connected.
| -
|-
|-
| 199
| 199
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -
Line 2,694: Line 1,502:
| Power
| Power
| GND
| GND
| -
| -
| -
| -
| -

Latest revision as of 12:31, 30 December 2023

VisionSOM-RT Datasheet and Pinout

General description

The VisionSOM-RT family is a SODIMM-sized SoM based on the NXP i.MX RT application processor which features an advanced implementation of a single ARM Cortex-M7 core (at speeds up to 600MHz).

The VisionSOM-RT is a low power highly integrated SoM (System-on-Module) featuring high computation performance, real-time functionality and MCU usability. High security enabled by AES-128, HAB and On-the-fly QSPI Flash Decryption together with 2D graphical acceleration make an ideally suited solution for home and industrial control systems, wireless application, communication solutions and real-time systems.

The system supports industrial grade targeting embedded application.

SOMLabs also provides a complete hardware and software development board for the SoM in the form of a carrier board and optional TFT display and touch panel.

Applications

  • Industrial embedded RTOS computer
  • Home Appliances
  • Home Automation – Smart Home
  • Human-machine Interfaces (HMI)
  • Point-of-sales (POS) terminals
  • Cash Register
  • 2D barcode scanners and printers
  • Smart grid Infrastructure
  • IoT gateways
  • Residential getaways
  • Machine vision equipment
  • Robotics
  • Fitness/outdoor equipment

Features

  • Powered by NXP i.MX RT application processor
  • Core clock up to 600MHz
  • 512kB on-chip RAM memory
  • 256Mb (32MB) SDRAM memory
  • 128Mb (16MB) QuadSPI Flash memory
  • Power-efficient and cost-optimized solution
  • Ideal for industrial IoT and embedded applications
  • FreeRTOS support

Pictures of SOM versions

Version Photo
RAM&QSPI
QSPI

Ordering info

SLSN2CpuType_Clock_RamSize_FlashSize_SF_TEMP_V
SLSProduct type
SLS - System on Module
NSOM Name
1 - VisionSOM SODIMM200
2CPU Family
2 - i.MX RT
CpuTypeCPU Type
RT52 - i.MX RT 1052
RT62 - i.MX RT 1062
ClockCPU Clock Speed
528C - 528MHz
RamSizeRAM Size
0R - No RAM
32R - 32MB
FlashSizeFlash Size Type and Density
4QSPI - 4MB QSPI Flash
16QSPI - 16MB QSPI Flash
SFSpecial Features
0SF - No Special Features
TEMPOperating Temperature
C - Consumer: 0 to +70 C
I - Industrial: -40 to +85 C
VSOM Version
A - Version 1.2

Block Diagram

Operating ranges

Parameter Value Unit Comment
Power Supply
5.0
V
 Connected to +5VIN SODIMM pin
Internal LDO output voltage
3.3
V
 Generated by internal LDO
Internal LDO output current
500
mA
 Maximum value
Input GPIO voltage
0...+3.3
V
 -
Environment temperature1
-40…+85
 oC Industrial range
0…+70
 Consumer range

Note:
1. Maximum MPU junction temperature is +105oC (industrial version) or +95oC (consumer version).

Electrical parameters

SOM
signal name 		Parameter Value Units
Min. Typ. Max.
+5VIN Supply Voltage 4.0 5.0 5.5 V
- Total Supply Current1 - 80 150 mA
VGPIO GPIO Input Voltage 0 3.3 3.62 V
+3.3VOUT SOM Internal LDO
Output Current 		- - 0.5 A
USB-OTGx-VBUS USB Supply 4.40 - 5.5 V
VDD-COIN-3V SNVS Backup
Battery Supply 		2.66 - 3.6 V
- ADC Inputs Voltage 0 - 3.3 V

Notes:
1. Excluding external load connected to +3.3VOUT lines.
2. Applying the maximum voltage 3.6V results in shorten lifetime. Recommended value is smaller than 3.5V.

Pinout

Important notes:
1. Detail pin configurations description you can find, edit and arrange in dedicated MEX files (with free "i.MX Pin Tool" configurational tool): VisionSOM-RT52 with QSPI Flash memory on board or VisionSOM-RT52 with eMMC Flash memory on board
2. LCD_DATAxx pins are internally used for boot sequence configuration. We recommend to use LCD_DATAxx lines as outputs or using eFuse boot configuration.
3. Internal peripherals and pin functions depends on i.MX-RT version (i.a. in RT1052 there is just one Ethernet channel). Description in table fits to RT1052 model.

SODIMM pin Functional domain Function name i.MX-RT pad name Description (refer to i.MX-RT manuals for details)
1 Power GND - -
2 Power GND - -
3 Ctrl PMIC-STBY-REQ CCM_PMIC_STBY_REQ Output, leave open if not used.
4 Ctrl MX-POR-B - External warm reset input, active L.
5 Ctrl PMIC-ON-REQ SNVS_PMIC_ON_REQ Output, leave open if not used.
6 Power VDD-SNVS-3V3 VDD_SNVS_IN SNVS backup power supply must be held between 2.9V and 3.3V if the system requires keeping real time and other data on OFF state. Internally connected to +3.3V, leave open.
7 BOOT BOOT1 GPIO_AD_B0_05 BOOT1 configuration line or multifunction GPIO with 3.3V logic levels.

By default this line is pulled-up with 1k resistor.

8 Power VDD-COIN-3V VDD_SNVS_IN Optional external coin battery for SNVS power domain, must be held between 2.9V and 3.3V if the system requires keeping real time and other data on OFF state.

Leave open if not used.

9 BOOT BOOT0 GPIO_AD_B0_04 BOOT1 configuration line or multifunction GPIO with 3.3V logic levels.

Pin shared with GPIO-B0-04 line. By default this line is pulled-down with 10k resistor.

10 NC - - Not internally connected.
11 USB USB-OTG2-VBUS USB_OTG2_VBUS +5V USB bus. Leave open if not used.
12 NC - - Not internally connected.
13 USB USB-OTG1-VBUS USB_OTG1_VBUS +5V USB bus. Leave open if not used.
14 Ctrl ONOFF ONOFF Input for power interrupt generation. Leave open if not used.
15 Power GND - -
16 Ctrl POR-B POR_B Cold reset negative logic input resets all modules and logic in the IC.May be used in addition to internally generated power on reset signal (logical AND, both internal and external signals are considered active low). The POR_B input (if used) must be immediately asserted at power-up and remain asserted until after the last power rail reaches its working voltage.
17 Power GND - -
18 NC - - Not internally connected.
19 USB USB-OTG2-DP USB_OTG2_DP Leave open if not used.
20 Power GND - -
21 USB USB-OTG2-DN USB_OTG2_DN Leave open if not used.
22 Power GND - -
23 Power GND - -
24 NC - - Not internally connected.
25 USB USB-OTG1-DP USB_OTG1_DP Leave open if not used.
26 Power GND - -
27 USB USB-OTG1-DN USB_OTG1_DN Leave open if not used.
28 Power GND - -
29 Power GND - -
30 NC - - Not internally connected.
31 USB nUSB-OTG-CHD USB_OTG1_CHD_B Leave open if not used.
32 NC - - Not internally connected.
33 JTAG JTAG-MOD GPIO_AD_B0_08 JTAG mode selector. multifunction GPIO with 3.3V levels. Leave open if not used (bulit-in 4.7k pull-down resistor).
34 NC - - Not internally connected.
35 Power GND - -
36 NC - - Not internally connected.
37 CLK1-N CCM_CLK1_N General purpose differential high speed clock input/output.Leave open if not used.
38 Power GND - -
39 CLK1-P CCM_CLK1_P General purpose differential high speed clock input/output.Leave open if not used.
40 Power GND - -
41 Power GND - -
42 NC - - Not internally connected.
43 JTAG JTAG-TDI GPIO_AD_B0_09 JTAG TDI input line. Multifunction GPIO with 3.3V logic levels.
44 NC - - Not internally connected.
45 GPIO GPIO-B1-09 GPIO_AD_B1_09 Multifunction GPIO with 3.3V logic levels.
46 JTAG JTAG-TMS GPIO_AD_B0_06 JTAG TMS input line. Multifunction GPIO with 3.3V logic levels.
47 GPIO GPIO-B0-04 GPIO_AD_B0_04 Multifunction GPIO with 3.3V logic levels.

Pin shared with BOOT-MODE0 line.

48 JTAG JTAG-nTRST GPIO_AD_B0_11 JTAG nTRST input line. Multifunction GPIO with 3.3V logic levels.
49 GPIO GPIO-B1-11 GPIO_AD_B1_11 Multifunction GPIO with 3.3V logic levels.
50 Power GND - -
51 Power GND - -
52 JTAG JTAG-TDO GPIO_AD_B0_10 JTAG TDO ouput line. Multifunction GPIO with 3.3V logic levels.
53 GPIO ENET-MDC GPIO_EMC_40 Multifunction GPIO with 3.3V logic levels.
54 JTAG JTAG-TCK GPIO_AD_B0_07 JTAG TCK input line. Multifunction GPIO with 3.3V logic levels.
55 GPIO GPIO-B0-03 GPIO_AD_B0_03 Multifunction GPIO with 3.3V logic levels.
56 GPIO GPIO-B1-14 GPIO_B1_14 Multifunction GPIO with 3.3V logic levels.
57 COM-GPIO UART1-TXD GPIO_AD_B0_12 UART1 TxD outputor multifunction GPIO with 3.3V logic levels.
58 GPIO GPIO-B0-02 GPIO_AD_B0_02 Multifunction GPIO with 3.3V logic levels.
59 Power GND - -
60 Power GND - -
61 GPIO ENET-MDIO GPIO_EMC_41 Multifunction GPIO with 3.3V logic levels.
62 GPIO GPIO-B0-01 GPIO_AD_B0_01 Multifunction GPIO with 3.3V logic levels.
63 COM-GPIO UART1-RXD GPIO_AD_B0_13 UART1 RxD inputor multifunction GPIO with 3.3V logic levels.
64 GPIO GPIO-B0-00 GPIO_AD_B0_00 Multifunction GPIO with 3.3V logic levels.
65 COM-GPIO UART2-TXD GPIO_AD_B1_02 UART2 TxD outputor multifunction GPIO with 3.3V logic levels.
66 COM-GPIO UART1-CTS GPIO_AD_B0_14 UART1 CTS outputor multifunction GPIO with 3.3V logic levels.
67 COM-GPIO UART2-RXD GPIO_AD_B1_03 UART2 RxD inputor multifunction GPIO with 3.3V logic levels.
68 COM-GPIO UART5-RXD GPIO_B1_13 UART5 RxD inputor multifunction GPIO with 3.3V logic levels.
69 COM-GPIO UART3-TXD GPIO_AD_B1_06 UART3 TxD inputor multifunction GPIO with 3.3V logic levels.
70 Power GND - -
71 Power GND - -
72 COM-GPIO UART2-CTS GPIO_AD_B1_00 UART2 CTS outputor multifunction GPIO with 3.3V logic levels.
73 COM-GPIO UART3-RXD GPIO_AD_B1_07 UART3 RxD inputor multifunction GPIO with 3.3V logic levels.
74 COM-GPIO UART1-RTS GPIO_AD_B0_15 UART1 RTS inputor multifunction GPIO with 3.3V logic levels.
75 NC - - Not internally connected.
76 COM-GPIO UART3-CTS GPIO_AD_B1_04 UART3 CTS outputor multifunction GPIO with 3.3V logic levels.
77 NC - - Not internally connected.
78 COM-GPIO UART2-RTS GPIO_AD_B1_01 UART2 RTS inputor multifunction GPIO with 3.3V logic levels.
79 COM-GPIO UART5-TXD GPIO_B1_12 UART5 TxD outputor multifunction GPIO with 3.3V logic levels.
80 COM-GPIO UART3-RTS GPIO_AD_B1_05 UART3 RTS inputor multifunction GPIO with 3.3V logic levels.
81 Power GND - -
82 Power GND - -
83 NC - - Not internally connected.
84 Power GND - -
85 Power +3.3VOUT - +3.3V generated by SOM's LDO.
86 NC - - Not internally connected.
87 Power +3.3VOUT - +3.3V generated by SOM's LDO.
88 Power +3.3VOUT - +3.3V generated by SOM's LDO.
89 Power +3.3VOUT - +3.3V generated by SOM's LDO.
90 Power +3.3VOUT - +3.3V generated by SOM's LDO.
91 Power +3.3VOUT - +3.3V generated by SOM's LDO.
92 Power +3.3VOUT - +3.3V generated by SOM's LDO.
93 Power +3.3VOUT - +3.3V generated by SOM's LDO.
94 NC - - Not internally connected.
95 NC - - Not internally connected.
96 Power +5VIN - +4.0-5.5V input power supply.
97 Ethernet ENET1-RXD0 GPIO_B1_04 Ethernet MAC1-PHY interface signal or multifunction GPIO with 3.3V logic levels.
98 Power +5VIN - +4.0-5.5V input power supply.
99 Ethernet ENET1-RXD1 GPIO_B1_05 Ethernet MAC1-PHY interface signal or multifunction GPIO with 3.3V logic levels.
100 Power +5VIN - +4.0-5.5V input power supply.
101 Ethernet ENET1-CRS-DV GPIO_B1_06 Ethernet MAC1-PHY interface signal or multifunction GPIO with 3.3V logic levels.
102 Power +5VIN +4.0-5.5V input power supply.
103 Power GND - -
104 Power +5VIN +4.0-5.5V input power supply.
105 NC - - Not internally connected.
106 Power +5VIN +4.0-5.5V input power supply.
107 Power GND - -
108 Power +5VIN +4.0-5.5V input power supply.
109 NC - - Not internally connected.
110 Power +5VIN - +4.0-5.5V input power supply.
111 Ethernet ENET2-RXD0 GPIO_AD_B1_14 Ethernet MAC2-PHY interface signal or multifunction GPIO with 3.3V logic levels.
112 Power +5VIN - +4.0-5.5V input power supply.
113 NC - - Not internally connected.
114 Ethernet ENET1-TXEN GPIO_B1_09 Ethernet MAC1-PHY interface signal or multifunction GPIO with 3.3V logic levels.
115 Power GND - -
116 Power GND - -
117 Ethernet ENET2-CRS-DV GPIO_AD_B1_15 Ethernet MAC2-PHY interface signal or multifunction GPIO with 3.3V logic levels.
118 Ethernet ENET1-TX-CLK GPIO_B1_10 Ethernet MAC1-PHY interface signal or multifunction GPIO with 3.3V logic levels.In series is connected 10R resistor.
119 Ethernet ENET2-TXD1 GPIO_AD_B1_13 Ethernet MAC2-PHY interface signal or multifunction GPIO with 3.3V logic levels.
120 Power GND - -
121 Ethernet ENET2-TXEN GPIO_AD_B1_12 Ethernet MAC2-PHY interface signal or multifunction GPIO with 3.3V logic levels.
122 Ethernet ENET1-TXD0 GPIO_B1_07 Ethernet MAC1-PHY interface signal or multifunction GPIO with 3.3V logic levels.
123 Ethernet ENET2-TXD0 GPIO_B1_15 Ethernet MAC2-PHY interface signal or multifunction GPIO with 3.3V logic levels.
124 Ethernet ENET1-TXD1 GPIO_B1_08 Ethernet MAC1-PHY interface signal or multifunction GPIO with 3.3V logic levels.
125 Power GND - -
126 Ethernet ENET1-RXER GPIO_B1_11 Ethernet MAC1-PHY interface signal or multifunction GPIO with 3.3V logic levels.
127 Power GND - -
128 Power GND - -
129 LCD LCD-DATA21 GPIO_B1_01 LCD interface signal or multifunction GPIO with 3.3V logic levels.
130 Power GND - -
131 LCD LCD-DATA22 GPIO_B1_02 LCD interface signal or multifunction GPIO with 3.3V logic levels.
132 Power GND - -
133 LCD LCD-DATA17 GND Internally connected to GND.
134 LCD LCD-DATA23 GPIO_B1_03 LCD interface signal or multifunction GPIO with 3.3V logic levels.
135 Power GND - -
136 Power GND - -
137 LCD LCD_DATA18 GND Internally connected to GND.
138 LCD LCD-DATA19 GPIO_B0_15 LCD interface signal or multifunction GPIO with 3.3V logic levels.

By default this pin is pulled-down with 10k resistor.

139 LCD LCD-DATA13 GPIO_B0_12 LCD interface signal or multifunction GPIO with 3.3V logic levels.

By default this pin is pulled-down with 10k resistor.

140 LCD LCD-DATA20 GPIO_B1_00 LCD interface signal or multifunction GPIO with 3.3V logic levels.
141 LCD LCD-DATA14 GPIO_B0_13 LCD interface signal or multifunction GPIO with 3.3V logic levels.

By default this pin is pulled-down with 10k resistor.

142 LCD LCD-DATA15 GPIO_B0_14 LCD interface signal or multifunction GPIO with 3.3V logic levels.

By default this pin is pulled-down with 10k resistor.

143 LCD LCD_DATA8 GND Internally connected to GND.
144 LCD LCD-DATA16 GND Internally connected to GND.
145 LCD LCD-DATA9 GND Internally connected to GND.
146 Power GND - -
147 Power GND - -
148 LCD LCD-DATA11 GPIO_B0_10 LCD interface signal or multifunction GPIO with 3.3V logic levels.

By default this pin is pulled-down with 10k resistor.

149 LCD LCD-DATA5 GPIO_B0_06 LCD interface signal or multifunction GPIO with 3.3V logic levels.

By default this pin is pulled-down with 10k resistor.

150 LCD LCD-DATA12 GPIO_B0_11 LCD interface signal or multifunction GPIO with 3.3V logic levels.

By default this pin is pulled-down with 10k resistor.

151 LCD LCD-DATA6 GPIO_B0_07 LCD interface signal or multifunction GPIO with 3.3V logic levels.

By default this pin is pulled-down with 10k resistor.

152 LCD LCD-DATA10 GPIO_B0_09 LCD interface signal or multifunction GPIO with 3.3V logic levels.

By default this pin is pulled-down with 10k resistor.

153 LCD LCD-DATA0 GND Internally connected to GND.
154 LCD LCD-DATA3 GPIO_B0_04 LCD interface signal or multifunction GPIO with 3.3V logic levels.

By default this pin is pulled-down with 10k resistor.

155 LCD LCD-DATA1 GND Internally connected to GND.
156 Power GND - -
157 LCD LCD-RESET GPIO_AD_B1_08 LCD interface signal or multifunction GPIO with 3.3V logic levels.
158 LCD LCD-DATA4 GPIO_B0_05 LCD interface signal or multifunction GPIO with 3.3V logic levels.

By default this pin is pulled-down with 10k resistor.

159 Power GND - -
160 LCD LCD-HSYNC GPIO_B0_02 LCD interface signal or multifunction GPIO with 3.3V logic levels.
161 LCD LCD-CLK GPIO_B0_00 LCD interface signal or multifunction GPIO with 3.3V logic levels.
162 LCD LCD-VSYNC GPIO_B0_03 LCD interface signal or multifunction GPIO with 3.3V logic levels.
163 LCD LCD-ENABLE GPIO_B0_01 LCD interface signal or multifunction GPIO with 3.3V logic levels.
164 LCD LCD-DATA2 GND Internally connected to GND.
165 Power GND - -
166 LCD LCD-DATA7 GPIO_B0_08 LCD interface signal or multifunction GPIO with 3.3V logic levels.

By default this pin is pulled-down with 10k resistor.

167 SDIO SDIO1-D0 GPIO_SD_B0_02 SDIO interface signal or multifunction GPIO with 3.3V logic levels.
168 NC - - Not internally connected.
169 SDIO SDIO1-D3 GPIO_SD_B0_05 SDIO interface signal or multifunction GPIO with 3.3V logic levels.
170 NC - - Not internally connected.
171 SDIO SDIO1-D1 GPIO_SD_B0_03 SDIO interface signal or multifunction GPIO with 3.3V logic levels.
172 NC - - Not internally connected.
173 SDIO SDIO1-CMD GPIO_SD_B0_00 SDIO interface signal or multifunction GPIO with 3.3V logic levels.
174 NC - - Not internally connected.
175 SDIO SDIO1-D2 GPIO_SD_B0_04 SDIO interface signal or multifunction GPIO with 3.3V logic levels.
176 NC - - Not internally connected.
177 Power GND - -
178 NC - - Not internally connected.
179 SDIO SDIO1-CLK GPIO_SD_B0_01 SDIO interface signal or multifunction GPIO with 3.3V logic levels.
180 NC - - Not internally connected.
181 Power GND - -
182 NC - - Not internally connected.
183 NC - - Not internally connected.
184 Power GND - -
185 Power GND - -
186 NC - Not internally connected.
187 NC - Not internally connected.
188 NC - - Not internally connected.
189 Power GND - -
190 NC - - Not internally connected.
191 NC - - Not internally connected.
192 NC - - Not internally connected.
193 NC - - Not internally connected.
194 NC - - Not internally connected.
195 NC - - Not internally connected.
196 NC - - Not internally connected.
197 NC - - Not internally connected.
198 NC - - Not internally connected.
199 Power GND - -
200 Power GND - -

Dimensions

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