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VisionSOM-6ULL Datasheet and Pinout: Difference between revisions

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Line 287: Line 287:
2. Applying the maximum voltage 3.6V results in shorten lifetime. Recommended value is smaller than 3.5V.<br />
2. Applying the maximum voltage 3.6V results in shorten lifetime. Recommended value is smaller than 3.5V.<br />


== SOM pinout ==
{| class="wikitable"
{| class="wikitable"
! SODIMM PIN
! style="text-align: center; font-weight: bold;" | SODIMM PIN
! Functionaldomain
! style="text-align: center; font-weight: bold;" | Functional
! Functionname
domain
! i.MX6 UltraLite/ULL Pad Name
! style="text-align: center; font-weight: bold;" | Function
! Alternate functions
name
! style="text-align: center; font-weight: bold;" | i.MX6 UltraLite/
ULL Pad Name
! style="text-align: center; font-weight: bold;" | Alternate functions
! Description (refer to i.MX6 UltraLite/ULL manuals for details)
! Description (refer to i.MX6 UltraLite/ULL manuals for details)
|-
|-
Line 343: Line 345:
| BOOT_MODE1
| BOOT_MODE1
| GPIO5_IO11
| GPIO5_IO11
| BOOT-MODE1 BOOT-MODE000 boot from fuses (default)01 serial downloader10 internal boot11 reserved
| BOOT-MODE1 BOOT-MODE0
00 boot from fuses (default)
01 serial downloader
10 internal boot
11 reserved
|-
|-
| 8
| 8
Line 357: Line 363:
| BOOT_MODE0
| BOOT_MODE0
| GPIO5_IO10
| GPIO5_IO10
| BOOT-MODE1 BOOT-MODE000 boot from fuses (default)01 serial downloader10 internal boot11 reserved
| BOOT-MODE1 BOOT-MODE0
00 boot from fuses (default)
01 serial downloader
10 internal boot
11 reserved
|-
|-
| 10
| 10
Line 406: Line 416:
| POR_B
| POR_B
| -
| -
| Cold reset negative logic input resets all modules and logic in the IC.May be used in addition to internally generated power on reset signal (logical AND, both internaland external signals are considered active low).
| Cold reset negative logic input resets all modules and logic in the IC.
May be used in addition to internally generated power on reset signal (logical AND, both internaland external signals are considered active low).
|-
|-
| 17
| 17
Line 608: Line 619:
| GPIO-8
| GPIO-8
| GPIO1_IO08
| GPIO1_IO08
| PWM1_OUTWDOG1_WDOG_BSPDIF_OUTCSI_VSYNCUSDHC2_VSELECTCCM_PMIC_RDYUART5_RTS_B
| PWM1_OUT
WDOG1_WDOG_B
SPDIF_OUT
CSI_VSYNC
USDHC2_VSELECT
CCM_PMIC_RDY
UART5_RTS_B
| Universal GPIO with 3.3V logic levels.
| Universal GPIO with 3.3V logic levels.
|-
|-
Line 622: Line 639:
| GPIO-4
| GPIO-4
| GPIO1_IO04
| GPIO1_IO04
| ENET1_REF_CLK1PWM3_OUTUSB_OTG1_PWRUSDHC1_RESET_BENET2_1588_EVENT0_INUART5_TX
| ENET1_REF_CLK1
PWM3_OUT
USB_OTG1_PWR
USDHC1_RESET_B
ENET2_1588_EVENT0_IN
UART5_TX
| Universal GPIO with 3.3V logic levels.
| Universal GPIO with 3.3V logic levels.
|-
|-
Line 636: Line 658:
| GPIO-5
| GPIO-5
| GPIO1_IO05WLAN-ENABLE in SOM with WiFi/BT module
| GPIO1_IO05WLAN-ENABLE in SOM with WiFi/BT module
| ENET2_REF_CLK2PWM4_OUTANATOP_OTG2_IDCSI_FIELDUSDHC1_VSELECTENET2_1588_EVENT0_OUTUART5_RX
| ENET2_REF_CLK2
PWM4_OUT
ANATOP_OTG2_ID
CSI_FIELD
USDHC1_VSELECT
ENET2_1588_EVENT0_OUT
UART5_RX
| Universal GPIO with 3.3V logic levels.
| Universal GPIO with 3.3V logic levels.
|-
|-
Line 664: Line 692:
| GPIO-7
| GPIO-7
| GPIO1_IO07
| GPIO1_IO07
| NET1_MDCENET2_MDCUSB_OTG_HOST_MODECSI_PIXCLKUSDHC2_CD_BCCM_STOPUART1_RTS_B
| NET1_MDC
ENET2_MDC
USB_OTG_HOST_MODE
CSI_PIXCLK
USDHC2_CD_BCCM_STOP
UART1_RTS_B
| Universal GPIO with 3.3V logic levels.
| Universal GPIO with 3.3V logic levels.
|-
|-
Line 678: Line 711:
| GPIO-3
| GPIO-3
| GPIO1_IO03
| GPIO1_IO03
| I2C1_SDAGPT1_COMPARE3USB_OTG2_OCUSDHC1_CD_BCCM_DI0_EXT_CLKSRC_TESTER_ACK
| I2C1_SDA
GPT1_COMPARE3
USB_OTG2_OC
USDHC1_CD_B
CCM_DI0_EXT_CLK
SRC_TESTER_ACK
| Universal GPIO with 3.3V logic levels.
| Universal GPIO with 3.3V logic levels.
|-
|-
Line 685: Line 723:
| GPIO-9
| GPIO-9
| GPIO1_IO09
| GPIO1_IO09
| PWM2_OUTWDOG1_WDOG_ANYSPDIF_INCSI_HSYNCUSDHC2_RESET_BUSDHC1_RESET_BUART5_CTS_B
| PWM2_OUT
WDOG1_WDOG_ANY
SPDIF_IN
CSI_HSYNC
USDHC2_RESET_B
USDHC1_RESET_B
UART5_CTS_B
| Universal GPIO with 3.3V logic levels.
| Universal GPIO with 3.3V logic levels.
|-
|-
Line 692: Line 736:
| UART1-TXD
| UART1-TXD
| UART1_TX_DATA
| UART1_TX_DATA
| ENET1_RDATA02I2C3_SCLCSI_DATA02GPT1_COMPARE1GPIO1_IO16SPDIF_OUTUART5_TX of
| ENET1_RDATA02
I2C3_SCL
CSI_DATA02
GPT1_COMPARE1
GPIO1_IO16
SPDIF_OUT
UART5_TX
| Default: UART1 TxD outputor universal GPIO with 3.3V logic levels.
| Default: UART1 TxD outputor universal GPIO with 3.3V logic levels.
|-
|-
Line 699: Line 749:
| GPIO-2
| GPIO-2
| GPIO1_IO02
| GPIO1_IO02
| I2C1_SCLGPT1_COMPARE2USB_OTG2_PWRENET1_REF_CLK_25MUSDHC1_WPSDMA_EXT_EVENT00SRC_ANY_PU_RESETUART1_TX
| I2C1_SCL
GPT1_COMPARE2
USB_OTG2_PWR
ENET1_REF_CLK_25M
USDHC1_WPS
DMA_EXT_EVENT00
SRC_ANY_PU_RESET
UART1_TX
| Universal GPIO with 3.3V logic levels.
| Universal GPIO with 3.3V logic levels.
|-
|-
Line 720: Line 777:
| GPIO-6
| GPIO-6
| GPIO1_IO06
| GPIO1_IO06
| ENET1_MDIOENET2_MDIOUSB_OTG_PWR_WAKECSI_MCLKUSDHC2_WPCCM_WAITCCM_REF_EN_BUART1_CTS_B
| ENET1_MDIO
ENET2_MDIO
USB_OTG_PWR_WAKE
CSI_MCLK
USDHC2_WPCCM_WAIT
CCM_REF_EN_B
UART1_CTS_B
| Universal GPIO with 3.3V logic levels.
| Universal GPIO with 3.3V logic levels.
|-
|-
Line 727: Line 790:
| GPIO-1
| GPIO-1
| GPIO1_IO01
| GPIO1_IO01
| I2C2_SDAGPT1_COMPARE1USB_OTG1_OCENET2_REF_CLK2MQS_LEFTENET1_1588_EVENT0_OUTSRC_EARLY_RESETWDOG1_WDOG_B
| I2C2_SDA
GPT1_COMPARE1
USB_OTG1_OC
ENET2_REF_CLK2
MQS_LEFT
ENET1_1588_EVENT0_OUT
SRC_EARLY_RESET
WDOG1_WDOG_B
| Universal GPIO with 3.3V logic levels.
| Universal GPIO with 3.3V logic levels.
|-
|-
Line 734: Line 804:
| UART1-RXD
| UART1-RXD
| UART1_RX_DATA
| UART1_RX_DATA
| ENET1_RDATA03I2C3_SDACSI_DATA03GPT1_CLKGPIO1_IO17SPDIF_INUART5_RX
| ENET1_RDATA03
I2C3_SDA
CSI_DATA03
GPT1_CLK
GPIO1_IO17
SPDIF_IN
UART5_RX
| Default: UART1 RxD inputor universal GPIO with 3.3V logic levels.
| Default: UART1 RxD inputor universal GPIO with 3.3V logic levels.
|-
|-
Line 741: Line 817:
| GPIO-0
| GPIO-0
| GPIO1_IO00
| GPIO1_IO00
| I2C2_SCLGPT1_CAPTURE1ANATOP_OTG1_IDENET1_REF_CLK1MQS_RIGHTENET1_1588_EVENT0_INSRC_SYSTEM_RESETWDOG3_WDOG_B
| I2C2_SCL
GPT1_CAPTURE1
ANATOP_OTG1_ID
ENET1_REF_CLK1
MQS_RIGHT
ENET1_1588_EVENT0_IN
SRC_SYSTEM_RESET
WDOG3_WDOG_B
| Universal GPIO with 3.3V logic levels.
| Universal GPIO with 3.3V logic levels.
|-
|-
Line 748: Line 831:
| UART2-TXD
| UART2-TXD
| UART2_TX_DATA
| UART2_TX_DATA
| ENET1_TDATA02I2C4_SCLCSI_DATA06GPT1_CAPTURE1GPIO1_IO20ECSPI3_SS0
| ENET1_TDATA02
I2C4_SCL
CSI_DATA06
GPT1_CAPTURE1
GPIO1_IO20
ECSPI3_SS0
| Default: UART2 TxD outputor universal GPIO with 3.3V logic levels.
| Default: UART2 TxD outputor universal GPIO with 3.3V logic levels.
|-
|-
Line 755: Line 843:
| UART1-CTS
| UART1-CTS
| UART1_CTS_B
| UART1_CTS_B
| ENET1_RX_CLKUSDHC1_WPCSI_DATA04ENET2_1588_EVENT1_INGPIO1_IO18USDHC2_WPUART5_CTS_B
| ENET1_RX_CLK
USDHC1_WP
CSI_DATA04
ENET2_1588_EVENT1_IN
GPIO1_IO18
USDHC2_WP
UART5_CTS_B
| Default: UART1 CTS outputor universal GPIO with 3.3V logic levels.
| Default: UART1 CTS outputor universal GPIO with 3.3V logic levels.
|-
|-
Line 762: Line 856:
| UART2-RXD
| UART2-RXD
| UART2_RX_DATA
| UART2_RX_DATA
| ENET1_TDATA03I2C4_SDACSI_DATA07GPT1_CAPTURE2GPIO1_IO21SJC_DONEECSPI3_SCLK
| ENET1_TDATA03
I2C4_SDA
CSI_DATA07
GPT1_CAPTURE2
GPIO1_IO21
SJC_DONE
ECSPI3_SCLK
| Default: UART2 RxD inputor universal GPIO with 3.3V logic levels.
| Default: UART2 RxD inputor universal GPIO with 3.3V logic levels.
|-
|-
Line 769: Line 869:
| UART5-RXD
| UART5-RXD
| UART5_RX_DATA
| UART5_RX_DATA
| ENET2_COLI2C2_SDACSI_DATA15CSU_CSU_INT_DEBGPIO1_IO31ECSPI2_MISOEPDC_PWRCTRL03
| ENET2_COL
I2C2_SDA
CSI_DATA15
CSU_CSU_INT_DEB
GPIO1_IO31
ECSPI2_MISO
EPDC_PWRCTRL03
| Default: UART5 RxD inputor universal GPIO with 3.3V logic levels.
| Default: UART5 RxD inputor universal GPIO with 3.3V logic levels.
|-
|-
Line 776: Line 882:
| UART3-TXD
| UART3-TXD
| UART3_TX_DATA
| UART3_TX_DATA
| ENET2_RDATA02CSI_DATA01UART2_CTS_BGPIO1_IO24SJC_JTAG_ACT
| ENET2_RDATA02
CSI_DATA01
UART2_CTS_B
GPIO1_IO24
SJC_JTAG_ACT
| Default: UART3 TxD inputor universal GPIO with 3.3V logic levels.
| Default: UART3 TxD inputor universal GPIO with 3.3V logic levels.
|-
|-
Line 797: Line 907:
| UART2-CTS
| UART2-CTS
| UART2_CTS_B
| UART2_CTS_B
| ENET1_CRSFLEXCAN2_TXCSI_DATA08GPT1_COMPARE2GPIO1_IO22SJC_DE_BECSPI3_MOSI
| ENET1_CRS
FLEXCAN2_TXCSI_DATA08
GPT1_COMPARE2
GPIO1_IO22
SJC_DE_B
ECSPI3_MOSI
| Default: UART2 CTS outputor universal GPIO with 3.3V logic levels.
| Default: UART2 CTS outputor universal GPIO with 3.3V logic levels.
|-
|-
Line 804: Line 919:
| UART3-RXD
| UART3-RXD
| UART3_RX_DATA
| UART3_RX_DATA
| ENET2_RDATA03CSI_DATA00UART2_RTS_BGPIO1_IO25EPIT1_OUT
| ENET2_RDATA03
CSI_DATA00
UART2_RTS_B
GPIO1_IO25
EPIT1_OUT
| Default: UART3 RxD inputor universal GPIO with 3.3V logic levels.
| Default: UART3 RxD inputor universal GPIO with 3.3V logic levels.
|-
|-
Line 811: Line 930:
| UART1-RTS
| UART1-RTS
| UART1_RTS_B
| UART1_RTS_B
| ENET1_TX_ERUSDHC1_CD_BCSI_DATA05ENET2_1588_EVENT1_OUTGPIO1_IO19USDHC2_CD_BUART5_RTS_B
| ENET1_TX_ER
USDHC1_CD_BCSI_DATA05
ENET2_1588_EVENT1_OUT
GPIO1_IO19
USDHC2_CD_B
UART5_RTS_B
| Default: UART1 RTS inputor universal GPIO with 3.3V logic levels.
| Default: UART1 RTS inputor universal GPIO with 3.3V logic levels.
|-
|-
Line 818: Line 942:
| UART4-TXD
| UART4-TXD
| UART4_TX_DATA
| UART4_TX_DATA
| ENET2_TDATA02I2C1_SCLCSI_DATA12CSU_CSU_ALARM_AUT02GPIO1_IO28ECSPI2_SCLK
| ENET2_TDATA02
I2C1_SCL
CSI_DATA12
CSU_CSU_ALARM_AUT02
GPIO1_IO28
ECSPI2_SCLK
| Default: UART4 TxD outputor universal GPIO with 3.3V logic levels.
| Default: UART4 TxD outputor universal GPIO with 3.3V logic levels.
|-
|-
Line 825: Line 954:
| UART3-CTS
| UART3-CTS
| UART3_CTS_B
| UART3_CTS_B
| ENET2_RX_CLKFLEXCAN1_TXCSI_DATA10ENET1_1588_EVENT1_INGPIO1_IO26EPIT2_OUT
| ENET2_RX_CLK
FLEXCAN1_TX
CSI_DATA10
ENET1_1588_EVENT1_IN
GPIO1_IO26
EPIT2_OUT
| Default: UART3 CTS outputor universal GPIO with 3.3V logic levels.
| Default: UART3 CTS outputor universal GPIO with 3.3V logic levels.
|-
|-
Line 832: Line 966:
| UART4-RXD
| UART4-RXD
| UART4_RX_DATA
| UART4_RX_DATA
| ENET2_TDATA03I2C1_SDACSI_DATA13CSU_CSU_ALARM_AUT01GPIO1_IO29ECSPI2_SS0EPDC_PWRCTRL01
| ENET2_TDATA03
I2C1_SDA
CSI_DATA13
CSU_CSU_ALARM_AUT01
GPIO1_IO29
ECSPI2_SS0
EPDC_PWRCTRL01
| Default: UART4 RxD inputor universal GPIO with 3.3V logic levels.
| Default: UART4 RxD inputor universal GPIO with 3.3V logic levels.
|-
|-
Line 839: Line 979:
| UART2-RTS
| UART2-RTS
| UART2_RTS_B
| UART2_RTS_B
| ENET1_COLFLEXCAN2_RXCSI_DATA09GPT1_COMPARE3GPIO1_IO23SJC_FAILECSPI3_MISO
| ENET1_COL
FLEXCAN2_RX
CSI_DATA09
GPT1_COMPARE3
GPIO1_IO23
SJC_FAIL
ECSPI3_MISO
| Default: UART2 RTS inputor universal GPIO with 3.3V logic levels.
| Default: UART2 RTS inputor universal GPIO with 3.3V logic levels.
|-
|-
Line 846: Line 992:
| UART5-TXD
| UART5-TXD
| UART5_TX_DATA
| UART5_TX_DATA
| GPIO1_IO30ECSPI2_MOSIEPDC_PWRCTRL02ENET2_CRSI2C2_SCLCSI_DATA14CSU_CSU_ALARM_AUT00
| GPIO1_IO30
ECSPI2_MOSI
EPDC_PWRCTRL02
ENET2_CRS
I2C2_SCL
CSI_DATA14
CSU_CSU_ALARM_AUT00
| Default: UART5 TxD outputor universal GPIO with 3.3V logic levels.
| Default: UART5 TxD outputor universal GPIO with 3.3V logic levels.
|-
|-
Line 853: Line 1,005:
| UART3-RTS
| UART3-RTS
| UART3_RTS_B
| UART3_RTS_B
| ENET2_TX_ERFLEXCAN1_RXCSI_DATA11ENET1_1588_EVENT1_OUTGPIO1_IO27WDOG1_WDOG_B
| ENET2_TX_ER
FLEXCAN1_RX
CSI_DATA11
ENET1_1588_EVENT1_OUT
GPIO1_IO27
WDOG1_WDOG_B
| Default: UART3 RTS inputor universal GPIO with 3.3V logic levels.
| Default: UART3 RTS inputor universal GPIO with 3.3V logic levels.
|-
|-
Line 972: Line 1,129:
| ENET1-RXD0
| ENET1-RXD0
| ENET1_RX_DATA0
| ENET1_RX_DATA0
| UART4_RTS_BPWM1_OUTCSI_DATA16FLEXCAN1_TXGPIO2_IO00KPP_ROW00USDHC1_LCTLEPDC_SDCE04
| UART4_RTS_B
PWM1_OUT
CSI_DATA16
FLEXCAN1_TX
GPIO2_IO00
KPP_ROW00
USDHC1_LCTL
EPDC_SDCE04
| Ethernet MAC1-PHY interface signal or universal GPIO with 3.3V logic levels.
| Ethernet MAC1-PHY interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 986: Line 1,150:
| ENET1-RXD1
| ENET1-RXD1
| ENET1_RX_DATA1
| ENET1_RX_DATA1
| UART4_CTS_BPWM2_OUTCSI_DATA17FLEXCAN1_RXGPIO2_IO01KPP_COL00USDHC2_LCTLEPDC_SDCE05
| UART4_CTS_B
PWM2_OUT
CSI_DATA17
FLEXCAN1_RX
GPIO2_IO01
KPP_COL00
USDHC2_LCTL
EPDC_SDCE05
| Ethernet MAC1-PHY interface signal or universal GPIO with 3.3V logic levels.
| Ethernet MAC1-PHY interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,000: Line 1,171:
| ENET1-CRS-DV
| ENET1-CRS-DV
| ENET1_RX_EN
| ENET1_RX_EN
| UART5_RTS_BCSI_DATA18FLEXCAN2_TXGPIO2_IO02KPP_ROW01USDHC1_VSELECTEPDC_SDCE06
| UART5_RTS_B
CSI_DATA18
FLEXCAN2_TX
GPIO2_IO02
KPP_ROW01
USDHC1_VSELECT
EPDC_SDCE06
| Ethernet MAC1-PHY interface signal or universal GPIO with 3.3V logic levels.
| Ethernet MAC1-PHY interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,028: Line 1,205:
| ENET2-TX-CLK
| ENET2-TX-CLK
| ENET2_TX_CLK
| ENET2_TX_CLK
| UART8_CTS_BECSPI4_MISOENET2_REF_CLK2GPIO2_IO14KPP_ROW07ANATOP_OTG2_IDEPDC_SDDO14
| UART8_CTS_B
ECSPI4_MISO
ENET2_REF_CLK2
GPIO2_IO14
KPP_ROW07
ANATOP_OTG2_ID
EPDC_SDDO14
| Ethernet MAC2-PHY interface signal or universal GPIO with 3.3V logic levels.
| Ethernet MAC2-PHY interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,056: Line 1,239:
| ENET2-RXER
| ENET2-RXER
| ENET2_RX_ER
| ENET2_RX_ER
| UART8_RTS_BECSPI4_SS0EIM_ADDR25GPIO2_IO15KPP_COL07WDOG1_WDOG_ANYEPDC_SDDO15
| UART8_RTS_B
ECSPI4_SS0
EIM_ADDR25
GPIO2_IO15
KPP_COL07
WDOG1_WDOG_ANY
EPDC_SDDO15
| Ethernet MAC2-PHY interface signal or universal GPIO with 3.3V logic levels.
| Ethernet MAC2-PHY interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,070: Line 1,259:
| ENET2-RXD0
| ENET2-RXD0
| ENET2_RX_DATA0
| ENET2_RX_DATA0
| UART6_TXI2C3_SCLENET1_MDIOGPIO2_IO08KPP_ROW04USB_OTG1_PWREPDC_SDDO08
| UART6_TX
I2C3_SCL
ENET1_MDIO
GPIO2_IO08
KPP_ROW04
USB_OTG1_PWR
EPDC_SDDO08
| Ethernet MAC2-PHY interface signal or universal GPIO with 3.3V logic levels.
| Ethernet MAC2-PHY interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,084: Line 1,279:
| ENET2-RXD1
| ENET2-RXD1
| ENET2_RX_DATA1
| ENET2_RX_DATA1
| UART6_RXI2C3_SDAENET1_MDCGPIO2_IO09KPP_COL04USB_OTG1_OCEPDC_SDDO09
| UART6_RX
I2C3_SDA
ENET1_MDC
GPIO2_IO09
KPP_COL04
USB_OTG1_OCE
PDC_SDDO09
| Ethernet MAC2-PHY interface signal or universal GPIO with 3.3V logic levels.
| Ethernet MAC2-PHY interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,091: Line 1,292:
| ENET1-TXEN
| ENET1-TXEN
| ENET1_TX_EN
| ENET1_TX_EN
| UART6_RTS_BPWM6_OUTCSI_DATA21ENET2_MDCGPIO2_IO05KPP_COL02WDOG2_WDOG_RST_B_DEBEPDC_SDCE09
| UART6_RTS_B
PWM6_OUT
CSI_DATA21
ENET2_MDC
GPIO2_IO05
KPP_COL02
WDOG2_WDOG_RST_B_DEB
EPDC_SDCE09
| Ethernet MAC1-PHY interface signal or universal GPIO with 3.3V logic levels.
| Ethernet MAC1-PHY interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,112: Line 1,320:
| ENET2-CRS-DV
| ENET2-CRS-DV
| ENET2_RX_EN
| ENET2_RX_EN
| UART7_TXI2C4_SCLEIM_ADDR26GPIO2_IO10KPP_ROW05ENET1_REF_CLK_25MEPDC_SDDO10
| UART7_TX
I2C4_SCL
EIM_ADDR26
GPIO2_IO10
KPP_ROW05
ENET1_REF_CLK_25M
EPDC_SDDO10
| Ethernet MAC2-PHY interface signal or universal GPIO with 3.3V logic levels.
| Ethernet MAC2-PHY interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,119: Line 1,333:
| ENET1-TX-CLK
| ENET1-TX-CLK
| ENET1_TX_CLK
| ENET1_TX_CLK
| UART7_CTS_BPWM7_OUTCSI_DATA22ENET1_REF_CLK1GPIO2_IO06KPP_ROW03GPT1_CLKEPDC_SDOED
| UART7_CTS_B
PWM7_OUT
CSI_DATA22
ENET1_REF_CLK1
GPIO2_IO06
KPP_ROW03
GPT1_CLK
EPDC_SDOED
| Ethernet MAC1-PHY interface signal or universal GPIO with 3.3V logic levels.
| Ethernet MAC1-PHY interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,126: Line 1,347:
| ENET2-TXD1
| ENET2-TXD1
| ENET2_TX_DATA1
| ENET2_TX_DATA1
| UART8_TXECSPI4_SCLKEIM_EB_B03GPIO2_IO12KPP_ROW06USB_OTG2_PWREPDC_SDDO12
| UART8_TX
ECSPI4_SCLK
EIM_EB_B03
GPIO2_IO12
KPP_ROW06
USB_OTG2_PWR
EPDC_SDDO12
| Ethernet MAC2-PHY interface signal or universal GPIO with 3.3V logic levels.
| Ethernet MAC2-PHY interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,140: Line 1,367:
| ENET2-TXEN
| ENET2-TXEN
| ENET2_TX_EN
| ENET2_TX_EN
| UART8_RXECSPI4_MOSIEIM_ACLK_FREERUNGPIO2_IO13KPP_COL06USB_OTG2_OCEPDC_SDDO13
| UART8_RX
ECSPI4_MOSI
EIM_ACLK_FREERUN
GPIO2_IO13
KPP_COL06
USB_OTG2_OC
EPDC_SDDO13
|  
|  
|-
|-
Line 1,147: Line 1,380:
| ENET1-TXD0
| ENET1-TXD0
| ENET1_TX_DATA0
| ENET1_TX_DATA0
| UART5_CTS_BCSI_DATA19FLEXCAN2_RXGPIO2_IO03KPP_COL01USDHC2_VSELECTEPDC_SDCE07
| UART5_CTS_B
CSI_DATA19
FLEXCAN2_RX
GPIO2_IO03
KPP_COL01
USDHC2_VSELECT
EPDC_SDCE07
| Ethernet MAC1-PHY interface signal or universal GPIO with 3.3V logic levels.
| Ethernet MAC1-PHY interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,154: Line 1,393:
| ENET2-TXD0
| ENET2-TXD0
| ENET2_TX_DATA0
| ENET2_TX_DATA0
| UART7_RXI2C4_SDAEIM_EB_B02GPIO2_IO11KPP_COL05EPDC_SDDO11
| UART7_RX
I2C4_SDA
EIM_EB_B02
GPIO2_IO11
KPP_COL05
EPDC_SDDO11
| Ethernet MAC2-PHY interface signal or universal GPIO with 3.3V logic levels.
| Ethernet MAC2-PHY interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,161: Line 1,405:
| ENET1-TXD1
| ENET1-TXD1
| ENET1_TX_DATA1
| ENET1_TX_DATA1
| UART6_CTS_BPWM5_OUTCSI_DATA20ENET2_MDIOGPIO2_IO04KPP_ROW02WDOG1_WDOG_RST_B_DEBEPDC_SDCE08
| UART6_CTS_B
PWM5_OUT
CSI_DATA20
ENET2_MDIO
GPIO2_IO04
KPP_ROW02
WDOG1_WDOG_RST_B_DEB
EPDC_SDCE08
| Ethernet MAC1-PHY interface signal or universal GPIO with 3.3V logic levels.
| Ethernet MAC1-PHY interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,175: Line 1,426:
| ENET1-RXER
| ENET1-RXER
| ENET1_RX_ER
| ENET1_RX_ER
| UART7_RTS_BPWM8_OUTCSI_DATA23EIM_CREGPIO2_IO07KPP_COL03GPT1_CAPTURE2EPDC_SDOEZ
| UART7_RTS_B
PWM8_OUT
CSI_DATA23
EIM_CRE
GPIO2_IO07
KPP_COL03
GPT1_CAPTURE2
EPDC_SDOEZ
| Ethernet MAC1-PHY interface signal or universal GPIO with 3.3V logic levels.
| Ethernet MAC1-PHY interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,196: Line 1,454:
| LCD-DATA21
| LCD-DATA21
| LCD_DATA21
| LCD_DATA21
| UART8_RXECSPI1_SS0CSI_DATA13EIM_DATA13GPIO3_IO26SRC_BT_CFG29USDHC2_DATA1EPDC_SDCE01
| UART8_RX
ECSPI1_SS0
CSI_DATA13
EIM_DATA13
GPIO3_IO26
SRC_BT_CFG29
USDHC2_DATA1
EPDC_SDCE01
| LCD interface signal or universal GPIO with 3.3V logic levels.
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,210: Line 1,475:
| LCD-DATA22
| LCD-DATA22
| LCD_DATA22
| LCD_DATA22
| MQS_RIGHTECSPI1_MOSICSI_DATA14EIM_DATA14GPIO3_IO27SRC_BT_CFG30USDHC2_DATA2USDHC2_DATA2
| MQS_RIGHT
ECSPI1_MOSI
CSI_DATA14
EIM_DATA14
GPIO3_IO27
SRC_BT_CFG30
USDHC2_DATA2
USDHC2_DATA2
| LCD interface signal or universal GPIO with 3.3V logic levels.
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,224: Line 1,496:
| LCD-DATA17
| LCD-DATA17
| LCD_DATA17
| LCD_DATA17
| UART7_RXCSI_DATA00EIM_DATA09GPIO3_IO22SRC_BT_CFG25USDHC2_DATA7EPDC_GDSP
| UART7_RX
CSI_DATA00
EIM_DATA09
GPIO3_IO22
SRC_BT_CFG25
USDHC2_DATA7
EPDC_GDSP
| LCD interface signal or universal GPIO with 3.3V logic levels.
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,231: Line 1,509:
| LCD-DATA23
| LCD-DATA23
| LCD_DATA23
| LCD_DATA23
| MQS_LEFTECSPI1_MISOCSI_DATA15EIM_DATA15GPIO3_IO28SRC_BT_CFG31USDHC2_DATA3EPDC_SDCE03
| MQS_LEFT
ECSPI1_MISO
CSI_DATA15
EIM_DATA15
GPIO3_IO28
SRC_BT_CFG31
USDHC2_DATA3
EPDC_SDCE03
| LCD interface signal or universal GPIO with 3.3V logic levels.
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,252: Line 1,537:
| LCD-DATA18
| LCD-DATA18
| LCD_DATA18
| LCD_DATA18
| PWM5_OUTCA7_MX6ULL_EVENTOCSI_DATA10EIM_DATA10GPIO3_IO23SRC_BT_CFG26USDHC2_CMDEPDC_BDR01
| PWM5_OUT
CA7_MX6ULL_EVENTO
CSI_DATA10
EIM_DATA10
GPIO3_IO23
SRC_BT_CFG26
USDHC2_CMD
EPDC_BDR01
| LCD interface signal or universal GPIO with 3.3V logic levels.
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,259: Line 1,551:
| LCD-DATA19
| LCD-DATA19
| LCD_DATA19
| LCD_DATA19
| PWM6_OUTWDOG1_WDOG_ANYCSI_DATA11EIM_DATA11GPIO3_IO24SRC_BT_CFG27USDHC2_CLKEPDC_VCOM00
| PWM6_OUT
WDOG1_WDOG_ANY
CSI_DATA11
EIM_DATA11
GPIO3_IO24
SRC_BT_CFG27
USDHC2_CLK
EPDC_VCOM00
| LCD interface signal or universal GPIO with 3.3V logic levels.
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,266: Line 1,565:
| LCD-DATA13
| LCD-DATA13
| LCD_DATA13
| LCD_DATA13
| SAI3_TX_BCLKCSI_DATA21EIM_DATA05GPIO3_IO18SRC_BT_CFG13USDHC2_RESET_BEPDC_BDR00
| SAI3_TX_BCLK
CSI_DATA21
EIM_DATA05
GPIO3_IO18
SRC_BT_CFG13
USDHC2_RESET_B
EPDC_BDR00
| LCD interface signal or universal GPIO with 3.3V logic levels.
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,273: Line 1,578:
| LCD-DATA20
| LCD-DATA20
| LCD_DATA20
| LCD_DATA20
| UART8_TXECSPI1_SCLKCSI_DATA12EIM_DATA12GPIO3_IO25SRC_BT_CFG28USDHC2_DATA0EPDC_VCOM01
| UART8_TX
ECSPI1_SCLK
CSI_DATA12
EIM_DATA12
GPIO3_IO25
SRC_BT_CFG28
USDHC2_DATA0
EPDC_VCOM01
| LCD interface signal or universal GPIO with 3.3V logic levels.
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,280: Line 1,592:
| LCD-DATA14
| LCD-DATA14
| LCD_DATA14
| LCD_DATA14
| SAI3_RX_DATACSI_DATA22EIM_DATA06GPIO3_IO19SRC_BT_CFG14USDHC2_DATA4EPDC_SDSHR
| SAI3_RX_DATA
CSI_DATA22
EIM_DATA06
GPIO3_IO19
SRC_BT_CFG14
USDHC2_DATA4
EPDC_SDSHR
| LCD interface signal or universal GPIO with 3.3V logic levels.
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,287: Line 1,605:
| LCD-DATA15
| LCD-DATA15
| LCD_DATA15
| LCD_DATA15
| SAI3_TX_DATACSI_DATA23EIM_DATA07GPIO3_IO20SRC_BT_CFG15USDHC2_DATA5EPDC_GDRL
| SAI3_TX_DATA
CSI_DATA23
EIM_DATA07
GPIO3_IO20
SRC_BT_CFG15
USDHC2_DATA5
EPDC_GDRL
| LCD interface signal or universal GPIO with 3.3V logic levels.
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,294: Line 1,618:
| LCD-DATA8
| LCD-DATA8
| LCD_DATA08
| LCD_DATA08
| SPDIF_INCSI_DATA16EIM_DATA00GPIO3_IO13SRC_BT_CFG08FLEXCAN1_TXEPDC_PWRIRQ
| SPDIF_IN
CSI_DATA16
EIM_DATA00
GPIO3_IO13
SRC_BT_CFG08
FLEXCAN1_TX
EPDC_PWRIRQ
| LCD interface signal or universal GPIO with 3.3V logic levels.
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,301: Line 1,631:
| LCD-DATA16
| LCD-DATA16
| LCD_DATA16
| LCD_DATA16
| UART7_TXCSI_DATA01EIM_DATA08GPIO3_IO21SRC_BT_CFG24USDHC2_DATA6EPDC_GDCLK
| UART7_TX
CSI_DATA01
EIM_DATA08
GPIO3_IO21
SRC_BT_CFG24
USDHC2_DATA6
EPDC_GDCLK
| LCD interface signal or universal GPIO with 3.3V logic levels.
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,308: Line 1,644:
| LCD-DATA9
| LCD-DATA9
| LCD_DATA09
| LCD_DATA09
| SAI3_MCLKCSI_DATA17EIM_DATA01GPIO3_IO14SRC_BT_CFG09FLEXCAN1_RXEPDC_PWRWAKE
| SAI3_MCLK
CSI_DATA17
EIM_DATA01
GPIO3_IO14
SRC_BT_CFG09
FLEXCAN1_RX
EPDC_PWRWAKE
| LCD interface signal or universal GPIO with 3.3V logic levels.
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,329: Line 1,671:
| LCD-DATA11
| LCD-DATA11
| LCD_DATA11
| LCD_DATA11
| SAI3_RX_BCLKCSI_DATA19EIM_DATA03GPIO3_IO16SRC_BT_CFG11FLEXCAN2_RXEPDC_PWRSTAT
| SAI3_RX_BCLK
CSI_DATA19
EIM_DATA03
GPIO3_IO16
SRC_BT_CFG11
FLEXCAN2_RX
EPDC_PWRSTAT
| LCD interface signal or universal GPIO with 3.3V logic levels.
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,336: Line 1,684:
| LCD-DATA5
| LCD-DATA5
| LCD_DATA05
| LCD_DATA05
| UART8_RTS_BENET2_1588_EVENT2_OUTSPDIF_OUTGPIO3_IO10SRC_BT_CFG05ECSPI1_SS1EPDC_SDDO05
| UART8_RTS_B
ENET2_1588_EVENT2_OUT
SPDIF_OUT
GPIO3_IO10
SRC_BT_CFG05
ECSPI1_SS1
EPDC_SDDO05
| LCD interface signal or universal GPIO with 3.3V logic levels.
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,343: Line 1,697:
| LCD-DATA12
| LCD-DATA12
| LCD_DATA12
| LCD_DATA12
| SAI3_TX_SYNCCSI_DATA20EIM_DATA04GPIO3_IO17SRC_BT_CFG12ECSPI1_RDYEPDC_PWRCTRL00
| SAI3_TX_SYNC
CSI_DATA20
EIM_DATA04
GPIO3_IO17
SRC_BT_CFG12
ECSPI1_RDY
EPDC_PWRCTRL00
| LCD interface signal or universal GPIO with 3.3V logic levels.
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,350: Line 1,710:
| LCD-DATA6
| LCD-DATA6
| LCD_DATA06
| LCD_DATA06
| UART7_CTS_BENET2_1588_EVENT3_INSPDIF_LOCKGPIO3_IO11SRC_BT_CFG06ECSPI1_SS2EPDC_SDDO06
| UART7_CTS_B
ENET2_1588_EVENT3_IN
SPDIF_LOCK
GPIO3_IO11
SRC_BT_CFG06
ECSPI1_SS2
EPDC_SDDO06
| LCD interface signal or universal GPIO with 3.3V logic levels.
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,357: Line 1,723:
| LCD-DATA10
| LCD-DATA10
| LCD_DATA10
| LCD_DATA10
| SAI3_RX_SYNCCSI_DATA18EIM_DATA02GPIO3_IO15SRC_BT_CFG10FLEXCAN2_TXEPDC_PWRCOM
| SAI3_RX_SYNC
CSI_DATA18
EIM_DATA02
GPIO3_IO15
SRC_BT_CFG10
FLEXCAN2_TX
EPDC_PWRCOM
| LCD interface signal or universal GPIO with 3.3V logic levels.
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,364: Line 1,736:
| LCD-DATA0
| LCD-DATA0
| LCD_DATA00
| LCD_DATA00
| PWM1_OUTENET1_1588_EVENT2_INI2C3_SDAGPIO3_IO05SRC_BT_CFG00SAI1_MCLKEPDC_SDDO00
| PWM1_OUT
ENET1_1588_EVENT2_IN
I2C3_SDA
GPIO3_IO05
SRC_BT_CFG00
SAI1_MCLK
EPDC_SDDO00
| LCD interface signal or universal GPIO with 3.3V logic levels.
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,371: Line 1,749:
| LCD-DATA3
| LCD-DATA3
| LCD_DATA03
| LCD_DATA03
| PWM4_OUTENET1_1588_EVENT3_OUTI2C4_SCLGPIO3_IO08SRC_BT_CFG03SAI1_RX_DATAEPDC_SDDO03 of
| PWM4_OUT
ENET1_1588_EVENT3_OUT
I2C4_SCL
GPIO3_IO08
SRC_BT_CFG03
SAI1_RX_DATA
EPDC_SDDO03
| LCD interface signal or universal GPIO with 3.3V logic levels.
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,378: Line 1,762:
| LCD-DATA1
| LCD-DATA1
| LCD_DATA01
| LCD_DATA01
| PWM2_OUTENET1_1588_EVENT2_OUTI2C3_SCLGPIO3_IO06SRC_BT_CFG01SAI1_TX_SYNCEPDC_SDDO01
| PWM2_OUT
ENET1_1588_EVENT2_OUT
I2C3_SCL
GPIO3_IO06
SRC_BT_CFG01
SAI1_TX_SYNC
EPDC_SDDO01
| LCD interface signal or universal GPIO with 3.3V logic levels.
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,392: Line 1,782:
| LCD-RESET
| LCD-RESET
| LCD_RESET
| LCD_RESET
| LCDIF_CSCA7_MX6ULL_EVENTISAI3_TX_DATAWDOG1_WDOG_ANYGPIO3_IO04ECSPI2_SS3EPDC_GDOE
| LCDIF_CS
CA7_MX6ULL_EVENT
ISAI3_TX_DATA
WDOG1_WDOG_ANY
GPIO3_IO04
ECSPI2_SS3
EPDC_GDOE
| LCD interface signal or universal GPIO with 3.3V logic levels.
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,399: Line 1,795:
| LCD-DATA4
| LCD-DATA4
| LCD_DATA04
| LCD_DATA04
| UART8_CTS_BENET2_1588_EVENT2_INSPDIF_SR_CLKGPIO3_IO09SRC_BT_CFG04SAI1_TX_DATAEPDC_SDDO04
| UART8_CTS_B
ENET2_1588_EVENT2_IN
SPDIF_SR_CLK
GPIO3_IO09
SRC_BT_CFG04
SAI1_TX_DATA
EPDC_SDDO04
| LCD interface signal or universal GPIO with 3.3V logic levels.
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,413: Line 1,815:
| LCD-HSYNC
| LCD-HSYNC
| LCD_HSYNC
| LCD_HSYNC
| LCDIF_RSUART4_CTS_BSAI3_TX_BCLKWDOG3_WDOG_RST_B_DEBGPIO3_IO02ECSPI2_SS1EPDC_SDOE
| LCDIF_RS
UART4_CTS_B
SAI3_TX_BCLK
WDOG3_WDOG_RST_B_DEB
GPIO3_IO02
ECSPI2_SS1
EPDC_SDOE
| LCD interface signal or universal GPIO with 3.3V logic levels.
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,420: Line 1,828:
| LCD-CLK
| LCD-CLK
| LCD_CLK
| LCD_CLK
| LCDIF_WR_RWNUART4_TXSAI3_MCLKEIM_CS2_BGPIO3_IO00WDOG1_WDOG_RST_B_DEBEPDC_SDCLK
| LCDIF_WR_RWN
UART4_TX
SAI3_MCLK
EIM_CS2_B
GPIO3_IO00
WDOG1_WDOG_RST_B_DEB
EPDC_SDCLK
| LCD interface signal or universal GPIO with 3.3V logic levels.
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,427: Line 1,841:
| LCD-VSYNC
| LCD-VSYNC
| LCD_VSYNC
| LCD_VSYNC
| LCDIF_BUSYUART4_RTS_BSAI3_RX_DATAWDOG2_WDOG_BGPIO3_IO03ECSPI2_SS2EPDC_SDCE00
| LCDIF_BUSY
UART4_RTS_B
SAI3_RX_DATA
WDOG2_WDOG_B
GPIO3_IO03
ECSPI2_SS2
EPDC_SDCE00
| LCD interface signal or universal GPIO with 3.3V logic levels.
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,434: Line 1,854:
| LCD-ENABLE
| LCD-ENABLE
| LCD_ENABLE
| LCD_ENABLE
| LCDIF_RD_EUART4_RXSAI3_TX_SYNCEIM_CS3_BGPIO3_IO01ECSPI2_RDYEPDC_SDLE
| LCDIF_RD_E
UART4_RX
SAI3_TX_SYNC
EIM_CS3_B
GPIO3_IO01
ECSPI2_RDY
EPDC_SDLE
| LCD interface signal or universal GPIO with 3.3V logic levels.
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,441: Line 1,867:
| LCD-DATA2
| LCD-DATA2
| LCD_DATA02
| LCD_DATA02
| PWM3_OUTENET1_1588_EVENT3_INI2C4_SDAGPIO3_IO07SRC_BT_CFG02SAI1_TX_BCLKEPDC_SDDO02
| PWM3_OUT
ENET1_1588_EVENT3_IN
I2C4_SDA
GPIO3_IO07
SRC_BT_CFG02
SAI1_TX_BCLK
EPDC_SDDO02
| LCD interface signal or universal GPIO with 3.3V logic levels.
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,455: Line 1,887:
| LCD-DATA7
| LCD-DATA7
| LCD_DATA07
| LCD_DATA07
| UART7_RTS_BENET2_1588_EVENT3_OUTSPDIF_EXT_CLKGPIO3_IO12SRC_BT_CFG07ECSPI1_SS3EPDC_SDDO07
| UART7_RTS_B
ENET2_1588_EVENT3_OUT
SPDIF_EXT_CLK
GPIO3_IO12
SRC_BT_CFG07
ECSPI1_SS3
EPDC_SDDO07
| LCD interface signal or universal GPIO with 3.3V logic levels.
| LCD interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,462: Line 1,900:
| SDIO1-D0
| SDIO1-D0
| SD1_DATA0
| SD1_DATA0
| GPT2_COMPARE3SAI2_TX_SYNCFLEXCAN1_TXEIM_ADDR21GPIO2_IO18ANATOP_OTG1_ID
| GPT2_COMPARE3
SAI2_TX_SYNC
FLEXCAN1_TX
EIM_ADDR21
GPIO2_IO18
ANATOP_OTG1_ID
| SDIO interface signal or universal GPIO with 3.3V logic levels.
| SDIO interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,476: Line 1,919:
| SDIO1-D3
| SDIO1-D3
| SD1_DATA3
| SD1_DATA3
| GPT2_CAPTURE2SAI2_TX_DATAFLEXCAN2_RXEIM_ADDR24GPIO2_IO21CCM_CLKO2ANATOP_OTG2_ID
| GPT2_CAPTURE2
SAI2_TX_DATA
FLEXCAN2_RX
EIM_ADDR24
GPIO2_IO21
CCM_CLKO2
ANATOP_OTG2_ID
| SDIO interface signal or universal GPIO with 3.3V logic levels.
| SDIO interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,490: Line 1,939:
| SDIO1-D1
| SDIO1-D1
| SD1_DATA1
| SD1_DATA1
| GPT2_CLKSAI2_TX_BCLKFLEXCAN1_RXEIM_ADDR22GPIO2_IO19USB_OTG2_PWR
| GPT2_CLK
SAI2_TX_BCLK
FLEXCAN1_RX
EIM_ADDR22
GPIO2_IO19
USB_OTG2_PWR
| SDIO interface signal or universal GPIO with 3.3V logic levels.
| SDIO interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,504: Line 1,958:
| SDIO1-CMD
| SDIO1-CMD
| SD1_CMD
| SD1_CMD
| GPT2_COMPARE1SAI2_RX_SYNCSPDIF_OUTEIM_ADDR19GPIO2_IO16SDMA_EXT_EVENT00USB_OTG1_PWR
| GPT2_COMPARE1
SAI2_RX_SYNC
SPDIF_OUT
EIM_ADDR19
GPIO2_IO16
SDMA_EXT_EVENT00
USB_OTG1_PWR
| SDIO interface signal or universal GPIO with 3.3V logic levels.
| SDIO interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,518: Line 1,978:
| SDIO1-D2
| SDIO1-D2
| SD1_DATA2
| SD1_DATA2
| GPT2_CAPTURE1SAI2_RX_DATAFLEXCAN2_TXEIM_ADDR23GPIO2_IO20CCM_CLKO1USB_OTG2_OC
| GPT2_CAPTURE1
SAI2_RX_DATA
FLEXCAN2_TX
EIM_ADDR23
GPIO2_IO20
CCM_CLKO1
USB_OTG2_OC
| SDIO interface signal or universal GPIO with 3.3V logic levels.
| SDIO interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,546: Line 2,012:
| SDIO1-CLK
| SDIO1-CLK
| SD1_CLK
| SD1_CLK
| GPT2_COMPARE2SAI2_MCLKSPDIF_INEIM_ADDR20GPIO2_IO17USB_OTG1_OC
| GPT2_COMPARE2
SAI2_MCLK
SPDIF_IN
EIM_ADDR20
GPIO2_IO17
USB_OTG1_OC
| SDIO interface signal or universal GPIO with 3.3V logic levels.
| SDIO interface signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,573: Line 2,044:
| CSI
| CSI
| CSI-PIXCLK
| CSI-PIXCLK
| CSI_PIXCLKBT-WAKE in SOM with WiFi/BT module
| CSI_PIXCLK
| USDHC2_WPRAWNAND_CE3_BI2C1_SCLEIM_OEGPIO4_IO18SNVS_HP_VIO_5UART6_RXESAI_TX2_RX3
BT-WAKE in SOM with WiFi/BT module
| USDHC2_WP
RAWNAND_CE3_B
I2C1_SCL
EIM_OE
GPIO4_IO18
SNVS_HP_VIO_5
UART6_RX
ESAI_TX2_RX3
| Video CMOS sensor signal or universal GPIO with 3.3V logic levels.
| Video CMOS sensor signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,594: Line 2,073:
| CSI
| CSI
| CSI-DATA6
| CSI-DATA6
| CSI_DATA06BT-PCM-OUT in SOM with WiFi/BT module
| CSI_DATA06
| USDHC2_DATA6ECSPI1_MOSIEIM_AD06GPIO4_IO27SAI1_RX_DATAUSDHC1_RESET_BESAI_TX5_RX0
BT-PCM-OUT in SOM with WiFi/BT module
| USDHC2_DATA6
ECSPI1_MOSI
EIM_AD06
GPIO4_IO27
SAI1_RX_DATA
USDHC1_RESET_BE
SAI_TX5_RX0
| Video CMOS sensor signal or universal GPIO with 3.3V logic levels.
| Video CMOS sensor signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,601: Line 2,087:
| CSI
| CSI
| CSI-MCLK
| CSI-MCLK
| CSI_MCLKBT-ENABLE in SOM with WiFi/BT module
| CSI_MCLK
| USDHC2_CD_BRAWNAND_CE2_BI2C1_SDAEIM_CS0_BGPIO4_IO17SNVS_HP_VIO_5_CTLUART6_TXESAI_TX3_RX2
BT-ENABLE in SOM with WiFi/BT module
| USDHC2_CD_B
RAWNAND_CE2_B
I2C1_SDA
EIM_CS0_B
GPIO4_IO17
SNVS_HP_VIO_5_CTL
UART6_TX
ESAI_TX3_RX2
| Video CMOS sensor signal or universal GPIO with 3.3V logic levels.
| Video CMOS sensor signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,608: Line 2,102:
| CSI
| CSI
| CSI-DATA7
| CSI-DATA7
| CSI_DATA07BT-PCM-IN in SOM with WiFi/BT module
| CSI_DATA07
| USDHC2_DATA7ECSPI1_MISOEIM_AD07GPIO4_IO28SAI1_TX_DATAUSDHC1_VSELECTESAI_TX0
BT-PCM-IN in SOM with WiFi/BT module
| USDHC2_DATA7
ECSPI1_MISO
EIM_AD07
GPIO4_IO28
SAI1_TX_DATA
USDHC1_VSELECT
ESAI_TX0
| Video CMOS sensor signal or universal GPIO with 3.3V logic levels.
| Video CMOS sensor signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,622: Line 2,123:
| CSI
| CSI
| CSI-DATA5
| CSI-DATA5
| CSI_DATA05BT-PCM-CLK in SOM with WiFi/BT module
| CSI_DATA05
| USDHC2_DATA5USDHC2_DATA5EIM_AD05GPIO4_IO26SAI1_TX_BCLKUSDHC1_CD_BESAI_TX_CLK
BT-PCM-CLK in SOM with WiFi/BT module
| USDHC2_DATA5
USDHC2_DATA5
EIM_AD05
GPIO4_IO26
SAI1_TX_BCLK
USDHC1_CD_BE
SAI_TX_CLK
| Video CMOS sensor signal or universal GPIO with 3.3V logic levels.
| Video CMOS sensor signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,629: Line 2,137:
| CSI
| CSI
| CSI-DATA4
| CSI-DATA4
| CSI_DATA04BT-PCM-SYNC in SOM with WiFi/BT module
| CSI_DATA04
| USDHC2_DATA4ECSPI1_SCLKEIM_AD04GPIO4_IO25SAI1_TX_SYNCUSDHC1_WPESAI_TX_FS
BT-PCM-SYNC in SOM with WiFi/BT module
| USDHC2_DATA4
ECSPI1_SCLK
EIM_AD04
GPIO4_IO25
SAI1_TX_SYNC
USDHC1_WP
ESAI_TX_FS
| Video CMOS sensor signal or universal GPIO with 3.3V logic levels.
| Video CMOS sensor signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,636: Line 2,151:
| CSI
| CSI
| CSI-DATA3
| CSI-DATA3
| CSI_DATA03BT-CTS in SOM with WiFi/BT module
| CSI_DATA03
| USDHC2_DATA3ECSPI2_MISOEIM_AD03GPIO4_IO24SAI1_RX_BCLKUART5_CTS_BESAI_RX_CLK
BT-CTS in SOM with WiFi/BT module
| USDHC2_DATA3
ECSPI2_MISO
EIM_AD03
GPIO4_IO24
SAI1_RX_BCLK
UART5_CTS_B
ESAI_RX_CLK
| Video CMOS sensor signal or universal GPIO with 3.3V logic levels.
| Video CMOS sensor signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,643: Line 2,165:
| CSI
| CSI
| CSI-DATA1
| CSI-DATA1
| CSI_DATA01BT-TXD in SOM with WiFi/BT module
| CSI_DATA01
| USDHC2_DATA1ECSPI2_SS0EIM_AD01GPIO4_IO22SAI1_MCLKUART5_RXESAI_RX_HF_CLK
BT-TXD in SOM with WiFi/BT module
| USDHC2_DATA1
ECSPI2_SS0
EIM_AD01
GPIO4_IO22
SAI1_MCLK
UART5_RX
ESAI_RX_HF_CLK
| Video CMOS sensor signal or universal GPIO with 3.3V logic levels.
| Video CMOS sensor signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,650: Line 2,179:
| CSI
| CSI
| CSI-DATA2
| CSI-DATA2
| CSI_DATA02BT-RTS in SOM with WiFi/BT module
| CSI_DATA02
| USDHC2_DATA2ECSPI2_MOSIEIM_AD02GPIO4_IO23SAI1_RX_SYNCUART5_RTS_BESAI_RX_FS
BT-RTS in SOM with WiFi/BT module
| USDHC2_DATA2
ECSPI2_MOSI
EIM_AD02
GPIO4_IO23
SAI1_RX_SYNC
UART5_RTS_B
ESAI_RX_FS
| Video CMOS sensor signal or universal GPIO with 3.3V logic levels.
| Video CMOS sensor signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,657: Line 2,193:
| CSI
| CSI
| CSI-DATA0
| CSI-DATA0
| CSI_DATA00BT-RXD in SOM with WiFi/BT module
| CSI_DATA00
| USDHC2_DATA0ECSPI2_SCLKEIM_AD00GPIO4_IO21SRC_INT_BOOTUART5_TXESAI_TX_HF_CLK
BT-RXD in SOM with WiFi/BT module
| USDHC2_DATA0
ECSPI2_SCLK
EIM_AD00
GPIO4_IO21
SRC_INT_BOOT
UART5_TX
ESAI_TX_HF_CLK
| Video CMOS sensor signal or universal GPIO with 3.3V logic levels.
| Video CMOS sensor signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,671: Line 2,214:
| CSI
| CSI
| CSI-HSYNC
| CSI-HSYNC
| CSI_HSYNCWLAN-HWAKE in SOM with WiFi/BT module
| CSI_HSYNC
| USDHC2_CMDI2C2_SCLEIM_LBA_BGPIO4_IO20PWM8_OUTUART6_CTS_BESAI_TX1
WLAN-HWAKE in SOM with WiFi/BT module
| USDHC2_CMD
I2C2_SCL
EIM_LBA_B
GPIO4_IO20
PWM8_OUT
UART6_CTS_B
ESAI_TX1
| Video CMOS sensor signal or universal GPIO with 3.3V logic levels.
| Video CMOS sensor signal or universal GPIO with 3.3V logic levels.
|-
|-
Line 1,678: Line 2,228:
| CSI
| CSI
| CSI-VSYNC
| CSI-VSYNC
| CSI_VSYNCBT-HWAKE in SOM with WiFi/BT module
| CSI_VSYNC
| SDHC2_CLKI2C2_SDAEIM_RWGPIO4_IO19PWM7_OUTUART6_RTS_BESAI_TX4_RX1
BT-HWAKE in SOM with WiFi/BT module
| SDHC2_CLK
I2C2_SDA
EIM_RW
GPIO4_IO19
PWM7_OUT
UART6_RTS_B
ESAI_TX4_RX1
| Video CMOS sensor signal or universal GPIO with 3.3V logic levels.
| Video CMOS sensor signal or universal GPIO with 3.3V logic levels.
|-
|-

Revision as of 13:39, 10 April 2018

VisionSOM-6ULL Datasheet and Pinout

General description

The VisionSOM-6ULL family is a SODIMM-sized SoM based on the NXP i.MX6 ULL application processor which features an advanced implementation of a single ARM Cortex-A7 core (at speeds up to 900MHz).

The VisionSOM-6ULL is a low power highly integrated SoM (System on Module) featuring high computation power and 802.11b/g/n Wi-Fi and Bluetooth v4.1 connectivity. The option of integrated, fully certified Wi-Fi and Bluetooth module simplifies the carrier board design and is ideally suited for wireless application. The VisionSOM-6ULL provides a variety memory configuration including flexible range of DDR3L, NAND, eMMC and SD memory card that meets our customers requirements.

The SoM supports connections to a variety of interfaces: two high-speed USB on-the-go with PHY, dual Ethernet, audio, display with touch panel and serial interfaces. In addition, the system supports industrial grade targeting embedded application.

SOMLabs also provides a complete hardware and software development board for the SoM in the form of a carrier board and optional TFT display and touch panel.

Applications

  • Industrial embedded Linux computer
  • Home Appliances
  • Home Automation – Smart Home
  • Human-machine Interfaces (HMI)
  • Point-of-sales (POS) terminals
  • Cash Register
  • 2D barcode scanners and printers
  • Smart grid Infrastructure
  • IoT gateways
  • Residential getaways
  • Machine vision equipment
  • Robotics
  • Fitness/outdoor equipment

Features

  • Powered by NXP i.MX 6ULL application processor
  • Core clock up to 900MHz
  • Up to 512MB SDRAM DDR3L
  • Up to 512MB NAND Flash / 32GB eMMC / uSD memory card
  • Optional Murata 802.11b/g/n Wi-Fi and Bluetooth v4.1+EDR module
  • Power-efficient and cost-optimized solution
  • Ideal for industrial IoT and embedded applications
  • Integrated security features

Pictures of SOM versions

Version Photo
eMMC
micro-SD
NAND Flash
Wi-Fi is available for all memory variants configurations.

Ordering info

SLSN6CpuType_Clock_RamSize_FlashSize_SF_TEMP_V
SLSProduct type
SLS - System on Module
NSOM Name
1 - VisionSOM SODIMM200
6CPU Family
6 - i.MX6
CpuTypeCPU Type
Y0 - i.MX6 ULL Y0
Y1 - i.MX6 ULL Y1
Y2 - i.MX6 ULL Y2
ClockCPU Clock Speed
528C - 528MHz
792C - 792MHz
900C - 900MHz
RamSizeDDR3 RAM Size
64R - 64MB
128R - 128MB
256R - 256MB
512R - 512MB
FlashSizeFlash Size Type and Density
SD - MicroSD connector
128N - 128MB NAND
256N - 256MB NAND
512N - 512MB NAND
04GE - 4GB eMMC
08GE - 8GB eMMC
16GE - 16GB eMMC
32GE - 32GB eMMC
SFSpecial Features
0SF - No Special Features
1WB - Built-in 802.11b/g/n Wi-Fi and Bluetooth v4.1+EDR Module
TEMPOperating Temperature
C - Consumer: 0 to +70 C
SI - Industrial with Wi-Fi: -30 to +70 C
I - Industrial: -40 to +85 C
VSOM Version
A - Version 1.0

Block Diagram

Operating ranges

Parameter Value Unit Comment
Power Supply
5.0
V
 Connected to +5VIN SODIMM pin
Input GPIO voltage
3.3
V
 -
Environment temperature1
-40…+85
 oC Industrial range w/o WiFi module
-30…+70
 Industrial range with WiFi module
0…+70
 Consumer range

Note:
1. Maximum MPU junction temperature is +105oC (industrial version) or +95oC (consumer version).

Electrical parameters

SOM
signal name 		Parameter Value Units
Min. Typ. Max.
+5VIN Supply Voltage 4.0 5.0 5.5 V
- Total Supply Current1 x x x A
VGPIO GPIO Input Voltage 0 3.3 3.62 V
+3.3VOUT SOM Internal LDO
Output Current 		- - 0.5 A
USB-OTGx-VBUS USB Supply 4.40 - 5.5 V
VDD-COIN-3V SNVS Backup
Battery Supply 		2.66 - 3.6 V
- ADC Inputs Voltage 0 - 3.3 V

Notes:
1. Excluding external load connected to +3.3VOUT lines.
2. Applying the maximum voltage 3.6V results in shorten lifetime. Recommended value is smaller than 3.5V.

SODIMM PIN Functional

domain

Function

name

i.MX6 UltraLite/

ULL Pad Name

Alternate functions Description (refer to i.MX6 UltraLite/ULL manuals for details)
1 Power GND - - -
2 Power GND - - -
3 Ctrl PMIC-STBY-REQ CCM_PMIC_STBY_REQ - Output, leave open if not used.
4 Ctrl MX6-POR-B - - External warm reset input, active L.
5 Ctrl PMIC-ON-REQ SNVS_PMIC_ON_REQ - Output, leave open if not used.
6 Power VDD-SNVS-3V3 VDD_SNVS_IN - SNVS backup power supply must be held between 2.9V and 3.3V if the system requires keeping real time and other data on OFF state. Internally connected to +3.3V, leave open.
7 BOOT BOOT-MODE1 BOOT_MODE1 GPIO5_IO11 BOOT-MODE1 BOOT-MODE0

00 boot from fuses (default) 01 serial downloader 10 internal boot 11 reserved

8 Power VDD-COIN-3V VDD_SNVS_IN - Optional external coin battery for SNVS power domain, must be held between 2.9V and 3.3V if the system requires keeping real time and other data on OFF state.Leave open if not used.
9 BOOT BOOT-MODE0 BOOT_MODE0 GPIO5_IO10 BOOT-MODE1 BOOT-MODE0

00 boot from fuses (default) 01 serial downloader 10 internal boot 11 reserved

10 GPIO-SNVS SNVS-TAMPER9 SNVS_TAMPER9 GPIO5_IO09 Tamper input (SNVS power domain) or GPIO 3.3V.
11 USB USB-OTG2-VBUS USB_OTG2_VBUS - +5V USB bus. Leave open if not used.
12 GPIO-SNVS SNVS-TAMPER5 SNVS_TAMPER5 GPIO5_IO05 Tamper input (SNVS power domain) or GPIO 3.3V.
13 USB USB-OTG1-VBUS USB_OTG1_VBUS - +5V USB bus. Leave open if not used.
14 Ctrl ONOFF SRC_RESET_B Input for power interrupt generation. Leave open if not used.
15 Power GND - - -
16 Ctrl POR-B POR_B - Cold reset negative logic input resets all modules and logic in the IC.

May be used in addition to internally generated power on reset signal (logical AND, both internaland external signals are considered active low).

17 Power GND - - -
18 GPIO-SNVS SNVS-TAMPER8 SNVS_TAMPER8 GPIO5_IO08 Tamper input (SNVS power domain) or GPIO 3.3V.
19 USB USB-OTG2-DP USB_OTG2_DP - Leave open if not used.
20 Power GND - - -
21 USB USB-OTG2-DN USB_OTG2_DN - Leave open if not used.
22 Power GND - - -
23 Power GND - - -
24 GPIO-SNVS SNVS-TAMPER7 SNVS_TAMPER7 GPIO5_IO07 Tamper input (SNVS power domain) or GPIO 3.3V.
25 USB USB-OTG1-DP USB_OTG1_DP - Leave open if not used.
26 Power GND - - -
27 USB USB-OTG1-DN USB_OTG1_DN - Leave open if not used.
28 Power GND - - -
29 Power GND - - -
30 GPIO-SNVS SNVS-TAMPER4 SNVS_TAMPER4 GPIO5_IO04 Tamper input (SNVS power domain) or GPIO 3.3V.
31 USB nUSB-OTG-CHD USB_OTG1_CHD_B - Leave open if not used.
32 GPIO-SNVS SNVS-TAMPER1 SNVS_TAMPER1 GPIO5_IO01 Tamper input (SNVS power domain) or GPIO 3.3V.
33 JTAG JTAG-MOD JTAG_MOD - Leave open if not used.
34 GPIO-SNVS SNVS-TAMPER3 SNVS_TAMPER3 GPIO5_IO03 Tamper input (SNVS power domain) or GPIO 3.3V.
35 Power GND - - -
36 GPIO-SNVS SNVS-TAMPER0 SNVS_TAMPER0 GPIO5_IO00 Tamper input (SNVS power domain) or GPIO 3.3V.
37 CLK1-N CCM_CLK1_N - General purpose differential high speed clock input/output.Leave open if not used.
38 Power GND - - -
39 CLK1-P CCM_CLK1_P - General purpose differential high speed clock input/output.Leave open if not used.
40 Power GND - - -
41 Power GND - - -
42 GPIO-SNVS SNVS-TAMPER6 SNVS_TAMPER6 GPIO5_IO06 Tamper input (SNVS power domain) or GPIO 3.3V.
43 JTAG JTAG-TDI JTAG_TDI - JTAG TDI input line.
44 GPIO-SNVS SNVS-TAMPER2 SNVS_TAMPER2 GPIO5_IO02 Tamper input (SNVS power domain) or GPIO 3.3V.
45 GPIO GPIO-8 GPIO1_IO08 PWM1_OUT

WDOG1_WDOG_B SPDIF_OUT CSI_VSYNC USDHC2_VSELECT CCM_PMIC_RDY UART5_RTS_B

Universal GPIO with 3.3V logic levels.
46 JTAG JTAG-TMS JTAG_TMS - JTAG TMS input line.
47 GPIO GPIO-4 GPIO1_IO04 ENET1_REF_CLK1

PWM3_OUT USB_OTG1_PWR USDHC1_RESET_B ENET2_1588_EVENT0_IN UART5_TX

Universal GPIO with 3.3V logic levels.
48 JTAG JTAG-nTRST JTAG_TRST_B - JTAG TRST input line (active L).
49 GPIO GPIO-5 GPIO1_IO05WLAN-ENABLE in SOM with WiFi/BT module ENET2_REF_CLK2

PWM4_OUT ANATOP_OTG2_ID CSI_FIELD USDHC1_VSELECT ENET2_1588_EVENT0_OUT UART5_RX

Universal GPIO with 3.3V logic levels.
50 Power GND - - -
51 Power GND - - -
52 JTAG JTAG-TDO JTAG_TDO - JTAG TDO output line.
53 GPIO GPIO-7 GPIO1_IO07 NET1_MDC

ENET2_MDC USB_OTG_HOST_MODE CSI_PIXCLK USDHC2_CD_BCCM_STOP UART1_RTS_B

Universal GPIO with 3.3V logic levels.
54 JTAG JTAG-TCK JTAG_TCK - JTAG TCK input line.
55 GPIO GPIO-3 GPIO1_IO03 I2C1_SDA

GPT1_COMPARE3 USB_OTG2_OC USDHC1_CD_B CCM_DI0_EXT_CLK SRC_TESTER_ACK

Universal GPIO with 3.3V logic levels.
56 GPIO GPIO-9 GPIO1_IO09 PWM2_OUT

WDOG1_WDOG_ANY SPDIF_IN CSI_HSYNC USDHC2_RESET_B USDHC1_RESET_B UART5_CTS_B

Universal GPIO with 3.3V logic levels.
57 COM-GPIO UART1-TXD UART1_TX_DATA ENET1_RDATA02

I2C3_SCL CSI_DATA02 GPT1_COMPARE1 GPIO1_IO16 SPDIF_OUT UART5_TX

Default: UART1 TxD outputor universal GPIO with 3.3V logic levels.
58 GPIO GPIO-2 GPIO1_IO02 I2C1_SCL

GPT1_COMPARE2 USB_OTG2_PWR ENET1_REF_CLK_25M USDHC1_WPS DMA_EXT_EVENT00 SRC_ANY_PU_RESET UART1_TX

Universal GPIO with 3.3V logic levels.
59 Power GND - - -
60 Power GND - - -
61 GPIO GPIO-6 GPIO1_IO06 ENET1_MDIO

ENET2_MDIO USB_OTG_PWR_WAKE CSI_MCLK USDHC2_WPCCM_WAIT CCM_REF_EN_B UART1_CTS_B

Universal GPIO with 3.3V logic levels.
62 GPIO GPIO-1 GPIO1_IO01 I2C2_SDA

GPT1_COMPARE1 USB_OTG1_OC ENET2_REF_CLK2 MQS_LEFT ENET1_1588_EVENT0_OUT SRC_EARLY_RESET WDOG1_WDOG_B

Universal GPIO with 3.3V logic levels.
63 COM-GPIO UART1-RXD UART1_RX_DATA ENET1_RDATA03

I2C3_SDA CSI_DATA03 GPT1_CLK GPIO1_IO17 SPDIF_IN UART5_RX

Default: UART1 RxD inputor universal GPIO with 3.3V logic levels.
64 GPIO GPIO-0 GPIO1_IO00 I2C2_SCL

GPT1_CAPTURE1 ANATOP_OTG1_ID ENET1_REF_CLK1 MQS_RIGHT ENET1_1588_EVENT0_IN SRC_SYSTEM_RESET WDOG3_WDOG_B

Universal GPIO with 3.3V logic levels.
65 COM-GPIO UART2-TXD UART2_TX_DATA ENET1_TDATA02

I2C4_SCL CSI_DATA06 GPT1_CAPTURE1 GPIO1_IO20 ECSPI3_SS0

Default: UART2 TxD outputor universal GPIO with 3.3V logic levels.
66 COM-GPIO UART1-CTS UART1_CTS_B ENET1_RX_CLK

USDHC1_WP CSI_DATA04 ENET2_1588_EVENT1_IN GPIO1_IO18 USDHC2_WP UART5_CTS_B

Default: UART1 CTS outputor universal GPIO with 3.3V logic levels.
67 COM-GPIO UART2-RXD UART2_RX_DATA ENET1_TDATA03

I2C4_SDA CSI_DATA07 GPT1_CAPTURE2 GPIO1_IO21 SJC_DONE ECSPI3_SCLK

Default: UART2 RxD inputor universal GPIO with 3.3V logic levels.
68 COM-GPIO UART5-RXD UART5_RX_DATA ENET2_COL

I2C2_SDA CSI_DATA15 CSU_CSU_INT_DEB GPIO1_IO31 ECSPI2_MISO EPDC_PWRCTRL03

Default: UART5 RxD inputor universal GPIO with 3.3V logic levels.
69 COM-GPIO UART3-TXD UART3_TX_DATA ENET2_RDATA02

CSI_DATA01 UART2_CTS_B GPIO1_IO24 SJC_JTAG_ACT

Default: UART3 TxD inputor universal GPIO with 3.3V logic levels.
70 Power GND - - -
71 Power GND - - -
72 COM-GPIO UART2-CTS UART2_CTS_B ENET1_CRS

FLEXCAN2_TXCSI_DATA08 GPT1_COMPARE2 GPIO1_IO22 SJC_DE_B ECSPI3_MOSI

Default: UART2 CTS outputor universal GPIO with 3.3V logic levels.
73 COM-GPIO UART3-RXD UART3_RX_DATA ENET2_RDATA03

CSI_DATA00 UART2_RTS_B GPIO1_IO25 EPIT1_OUT

Default: UART3 RxD inputor universal GPIO with 3.3V logic levels.
74 COM-GPIO UART1-RTS UART1_RTS_B ENET1_TX_ER

USDHC1_CD_BCSI_DATA05 ENET2_1588_EVENT1_OUT GPIO1_IO19 USDHC2_CD_B UART5_RTS_B

Default: UART1 RTS inputor universal GPIO with 3.3V logic levels.
75 COM-GPIO UART4-TXD UART4_TX_DATA ENET2_TDATA02

I2C1_SCL CSI_DATA12 CSU_CSU_ALARM_AUT02 GPIO1_IO28 ECSPI2_SCLK

Default: UART4 TxD outputor universal GPIO with 3.3V logic levels.
76 COM-GPIO UART3-CTS UART3_CTS_B ENET2_RX_CLK

FLEXCAN1_TX CSI_DATA10 ENET1_1588_EVENT1_IN GPIO1_IO26 EPIT2_OUT

Default: UART3 CTS outputor universal GPIO with 3.3V logic levels.
77 COM-GPIO UART4-RXD UART4_RX_DATA ENET2_TDATA03

I2C1_SDA CSI_DATA13 CSU_CSU_ALARM_AUT01 GPIO1_IO29 ECSPI2_SS0 EPDC_PWRCTRL01

Default: UART4 RxD inputor universal GPIO with 3.3V logic levels.
78 COM-GPIO UART2-RTS UART2_RTS_B ENET1_COL

FLEXCAN2_RX CSI_DATA09 GPT1_COMPARE3 GPIO1_IO23 SJC_FAIL ECSPI3_MISO

Default: UART2 RTS inputor universal GPIO with 3.3V logic levels.
79 COM-GPIO UART5-TXD UART5_TX_DATA GPIO1_IO30

ECSPI2_MOSI EPDC_PWRCTRL02 ENET2_CRS I2C2_SCL CSI_DATA14 CSU_CSU_ALARM_AUT00

Default: UART5 TxD outputor universal GPIO with 3.3V logic levels.
80 COM-GPIO UART3-RTS UART3_RTS_B ENET2_TX_ER

FLEXCAN1_RX CSI_DATA11 ENET1_1588_EVENT1_OUT GPIO1_IO27 WDOG1_WDOG_B

Default: UART3 RTS inputor universal GPIO with 3.3V logic levels.
81 Power GND - - -
82 Power GND - - -
83 NC - - - -
84 Power GND - - -
85 Power +3.3VOUT - - +3.3V generated by SOM's LDO.
86 NC - - - -
87 Power +3.3VOUT - - +3.3V generated by SOM's LDO.
88 Power +3.3VOUT - - +3.3V generated by SOM's LDO.
89 Power +3.3VOUT - - +3.3V generated by SOM's LDO.
90 Power +3.3VOUT - - +3.3V generated by SOM's LDO.
91 Power +3.3VOUT - - +3.3V generated by SOM's LDO.
92 Power +3.3VOUT - - +3.3V generated by SOM's LDO.
93 Power +3.3VOUT - - +3.3V generated by SOM's LDO.
94 NC - - - -
95 NC - - - -
96 Power +5VIN - - +4.0-5.5V input power supply.
97 Ethernet ENET1-RXD0 ENET1_RX_DATA0 UART4_RTS_B

PWM1_OUT CSI_DATA16 FLEXCAN1_TX GPIO2_IO00 KPP_ROW00 USDHC1_LCTL EPDC_SDCE04

Ethernet MAC1-PHY interface signal or universal GPIO with 3.3V logic levels.
98 Power +5VIN - - +4.0-5.5V input power supply.
99 Ethernet ENET1-RXD1 ENET1_RX_DATA1 UART4_CTS_B

PWM2_OUT CSI_DATA17 FLEXCAN1_RX GPIO2_IO01 KPP_COL00 USDHC2_LCTL EPDC_SDCE05

Ethernet MAC1-PHY interface signal or universal GPIO with 3.3V logic levels.
100 Power +5VIN - - +4.0-5.5V input power supply.
101 Ethernet ENET1-CRS-DV ENET1_RX_EN UART5_RTS_B

CSI_DATA18 FLEXCAN2_TX GPIO2_IO02 KPP_ROW01 USDHC1_VSELECT EPDC_SDCE06

Ethernet MAC1-PHY interface signal or universal GPIO with 3.3V logic levels.
102 Power +5VIN +4.0-5.5V input power supply.
103 Power GND - - -
104 Power +5VIN +4.0-5.5V input power supply.
105 Ethernet ENET2-TX-CLK ENET2_TX_CLK UART8_CTS_B

ECSPI4_MISO ENET2_REF_CLK2 GPIO2_IO14 KPP_ROW07 ANATOP_OTG2_ID EPDC_SDDO14

Ethernet MAC2-PHY interface signal or universal GPIO with 3.3V logic levels.
106 Power +5VIN +4.0-5.5V input power supply.
107 Power GND - - -
108 Power +5VIN +4.0-5.5V input power supply.
109 Ethernet ENET2-RXER ENET2_RX_ER UART8_RTS_B

ECSPI4_SS0 EIM_ADDR25 GPIO2_IO15 KPP_COL07 WDOG1_WDOG_ANY EPDC_SDDO15

Ethernet MAC2-PHY interface signal or universal GPIO with 3.3V logic levels.
110 Power +5VIN - - +4.0-5.5V input power supply.
111 Ethernet ENET2-RXD0 ENET2_RX_DATA0 UART6_TX

I2C3_SCL ENET1_MDIO GPIO2_IO08 KPP_ROW04 USB_OTG1_PWR EPDC_SDDO08

Ethernet MAC2-PHY interface signal or universal GPIO with 3.3V logic levels.
112 Power +5VIN - - +4.0-5.5V input power supply.
113 Ethernet ENET2-RXD1 ENET2_RX_DATA1 UART6_RX

I2C3_SDA ENET1_MDC GPIO2_IO09 KPP_COL04 USB_OTG1_OCE PDC_SDDO09

Ethernet MAC2-PHY interface signal or universal GPIO with 3.3V logic levels.
114 Ethernet ENET1-TXEN ENET1_TX_EN UART6_RTS_B

PWM6_OUT CSI_DATA21 ENET2_MDC GPIO2_IO05 KPP_COL02 WDOG2_WDOG_RST_B_DEB EPDC_SDCE09

Ethernet MAC1-PHY interface signal or universal GPIO with 3.3V logic levels.
115 Power GND - - -
116 Power GND - - -
117 Ethernet ENET2-CRS-DV ENET2_RX_EN UART7_TX

I2C4_SCL EIM_ADDR26 GPIO2_IO10 KPP_ROW05 ENET1_REF_CLK_25M EPDC_SDDO10

Ethernet MAC2-PHY interface signal or universal GPIO with 3.3V logic levels.
118 Ethernet ENET1-TX-CLK ENET1_TX_CLK UART7_CTS_B

PWM7_OUT CSI_DATA22 ENET1_REF_CLK1 GPIO2_IO06 KPP_ROW03 GPT1_CLK EPDC_SDOED

Ethernet MAC1-PHY interface signal or universal GPIO with 3.3V logic levels.
119 Ethernet ENET2-TXD1 ENET2_TX_DATA1 UART8_TX

ECSPI4_SCLK EIM_EB_B03 GPIO2_IO12 KPP_ROW06 USB_OTG2_PWR EPDC_SDDO12

Ethernet MAC2-PHY interface signal or universal GPIO with 3.3V logic levels.
120 Power GND - - -
121 Ethernet ENET2-TXEN ENET2_TX_EN UART8_RX

ECSPI4_MOSI EIM_ACLK_FREERUN GPIO2_IO13 KPP_COL06 USB_OTG2_OC EPDC_SDDO13

122 Ethernet ENET1-TXD0 ENET1_TX_DATA0 UART5_CTS_B

CSI_DATA19 FLEXCAN2_RX GPIO2_IO03 KPP_COL01 USDHC2_VSELECT EPDC_SDCE07

Ethernet MAC1-PHY interface signal or universal GPIO with 3.3V logic levels.
123 Ethernet ENET2-TXD0 ENET2_TX_DATA0 UART7_RX

I2C4_SDA EIM_EB_B02 GPIO2_IO11 KPP_COL05 EPDC_SDDO11

Ethernet MAC2-PHY interface signal or universal GPIO with 3.3V logic levels.
124 Ethernet ENET1-TXD1 ENET1_TX_DATA1 UART6_CTS_B

PWM5_OUT CSI_DATA20 ENET2_MDIO GPIO2_IO04 KPP_ROW02 WDOG1_WDOG_RST_B_DEB EPDC_SDCE08

Ethernet MAC1-PHY interface signal or universal GPIO with 3.3V logic levels.
125 Power GND - - -
126 Ethernet ENET1-RXER ENET1_RX_ER UART7_RTS_B

PWM8_OUT CSI_DATA23 EIM_CRE GPIO2_IO07 KPP_COL03 GPT1_CAPTURE2 EPDC_SDOEZ

Ethernet MAC1-PHY interface signal or universal GPIO with 3.3V logic levels.
127 Power GND - - -
128 Power GND - - -
129 LCD LCD-DATA21 LCD_DATA21 UART8_RX

ECSPI1_SS0 CSI_DATA13 EIM_DATA13 GPIO3_IO26 SRC_BT_CFG29 USDHC2_DATA1 EPDC_SDCE01

LCD interface signal or universal GPIO with 3.3V logic levels.
130 Power GND - - -
131 LCD LCD-DATA22 LCD_DATA22 MQS_RIGHT

ECSPI1_MOSI CSI_DATA14 EIM_DATA14 GPIO3_IO27 SRC_BT_CFG30 USDHC2_DATA2 USDHC2_DATA2

LCD interface signal or universal GPIO with 3.3V logic levels.
132 Power GND - - -
133 LCD LCD-DATA17 LCD_DATA17 UART7_RX

CSI_DATA00 EIM_DATA09 GPIO3_IO22 SRC_BT_CFG25 USDHC2_DATA7 EPDC_GDSP

LCD interface signal or universal GPIO with 3.3V logic levels.
134 LCD LCD-DATA23 LCD_DATA23 MQS_LEFT

ECSPI1_MISO CSI_DATA15 EIM_DATA15 GPIO3_IO28 SRC_BT_CFG31 USDHC2_DATA3 EPDC_SDCE03

LCD interface signal or universal GPIO with 3.3V logic levels.
135 Power GND - - -
136 Power GND - - -
137 LCD LCD-DATA18 LCD_DATA18 PWM5_OUT

CA7_MX6ULL_EVENTO CSI_DATA10 EIM_DATA10 GPIO3_IO23 SRC_BT_CFG26 USDHC2_CMD EPDC_BDR01

LCD interface signal or universal GPIO with 3.3V logic levels.
138 LCD LCD-DATA19 LCD_DATA19 PWM6_OUT

WDOG1_WDOG_ANY CSI_DATA11 EIM_DATA11 GPIO3_IO24 SRC_BT_CFG27 USDHC2_CLK EPDC_VCOM00

LCD interface signal or universal GPIO with 3.3V logic levels.
139 LCD LCD-DATA13 LCD_DATA13 SAI3_TX_BCLK

CSI_DATA21 EIM_DATA05 GPIO3_IO18 SRC_BT_CFG13 USDHC2_RESET_B EPDC_BDR00

LCD interface signal or universal GPIO with 3.3V logic levels.
140 LCD LCD-DATA20 LCD_DATA20 UART8_TX

ECSPI1_SCLK CSI_DATA12 EIM_DATA12 GPIO3_IO25 SRC_BT_CFG28 USDHC2_DATA0 EPDC_VCOM01

LCD interface signal or universal GPIO with 3.3V logic levels.
141 LCD LCD-DATA14 LCD_DATA14 SAI3_RX_DATA

CSI_DATA22 EIM_DATA06 GPIO3_IO19 SRC_BT_CFG14 USDHC2_DATA4 EPDC_SDSHR

LCD interface signal or universal GPIO with 3.3V logic levels.
142 LCD LCD-DATA15 LCD_DATA15 SAI3_TX_DATA

CSI_DATA23 EIM_DATA07 GPIO3_IO20 SRC_BT_CFG15 USDHC2_DATA5 EPDC_GDRL

LCD interface signal or universal GPIO with 3.3V logic levels.
143 LCD LCD-DATA8 LCD_DATA08 SPDIF_IN

CSI_DATA16 EIM_DATA00 GPIO3_IO13 SRC_BT_CFG08 FLEXCAN1_TX EPDC_PWRIRQ

LCD interface signal or universal GPIO with 3.3V logic levels.
144 LCD LCD-DATA16 LCD_DATA16 UART7_TX

CSI_DATA01 EIM_DATA08 GPIO3_IO21 SRC_BT_CFG24 USDHC2_DATA6 EPDC_GDCLK

LCD interface signal or universal GPIO with 3.3V logic levels.
145 LCD LCD-DATA9 LCD_DATA09 SAI3_MCLK

CSI_DATA17 EIM_DATA01 GPIO3_IO14 SRC_BT_CFG09 FLEXCAN1_RX EPDC_PWRWAKE

LCD interface signal or universal GPIO with 3.3V logic levels.
146 Power GND - - -
147 Power GND - - -
148 LCD LCD-DATA11 LCD_DATA11 SAI3_RX_BCLK

CSI_DATA19 EIM_DATA03 GPIO3_IO16 SRC_BT_CFG11 FLEXCAN2_RX EPDC_PWRSTAT

LCD interface signal or universal GPIO with 3.3V logic levels.
149 LCD LCD-DATA5 LCD_DATA05 UART8_RTS_B

ENET2_1588_EVENT2_OUT SPDIF_OUT GPIO3_IO10 SRC_BT_CFG05 ECSPI1_SS1 EPDC_SDDO05

LCD interface signal or universal GPIO with 3.3V logic levels.
150 LCD LCD-DATA12 LCD_DATA12 SAI3_TX_SYNC

CSI_DATA20 EIM_DATA04 GPIO3_IO17 SRC_BT_CFG12 ECSPI1_RDY EPDC_PWRCTRL00

LCD interface signal or universal GPIO with 3.3V logic levels.
151 LCD LCD-DATA6 LCD_DATA06 UART7_CTS_B

ENET2_1588_EVENT3_IN SPDIF_LOCK GPIO3_IO11 SRC_BT_CFG06 ECSPI1_SS2 EPDC_SDDO06

LCD interface signal or universal GPIO with 3.3V logic levels.
152 LCD LCD-DATA10 LCD_DATA10 SAI3_RX_SYNC

CSI_DATA18 EIM_DATA02 GPIO3_IO15 SRC_BT_CFG10 FLEXCAN2_TX EPDC_PWRCOM

LCD interface signal or universal GPIO with 3.3V logic levels.
153 LCD LCD-DATA0 LCD_DATA00 PWM1_OUT

ENET1_1588_EVENT2_IN I2C3_SDA GPIO3_IO05 SRC_BT_CFG00 SAI1_MCLK EPDC_SDDO00

LCD interface signal or universal GPIO with 3.3V logic levels.
154 LCD LCD-DATA3 LCD_DATA03 PWM4_OUT

ENET1_1588_EVENT3_OUT I2C4_SCL GPIO3_IO08 SRC_BT_CFG03 SAI1_RX_DATA EPDC_SDDO03

LCD interface signal or universal GPIO with 3.3V logic levels.
155 LCD LCD-DATA1 LCD_DATA01 PWM2_OUT

ENET1_1588_EVENT2_OUT I2C3_SCL GPIO3_IO06 SRC_BT_CFG01 SAI1_TX_SYNC EPDC_SDDO01

LCD interface signal or universal GPIO with 3.3V logic levels.
156 Power GND - - -
157 LCD LCD-RESET LCD_RESET LCDIF_CS

CA7_MX6ULL_EVENT ISAI3_TX_DATA WDOG1_WDOG_ANY GPIO3_IO04 ECSPI2_SS3 EPDC_GDOE

LCD interface signal or universal GPIO with 3.3V logic levels.
158 LCD LCD-DATA4 LCD_DATA04 UART8_CTS_B

ENET2_1588_EVENT2_IN SPDIF_SR_CLK GPIO3_IO09 SRC_BT_CFG04 SAI1_TX_DATA EPDC_SDDO04

LCD interface signal or universal GPIO with 3.3V logic levels.
159 Power GND - - -
160 LCD LCD-HSYNC LCD_HSYNC LCDIF_RS

UART4_CTS_B SAI3_TX_BCLK WDOG3_WDOG_RST_B_DEB GPIO3_IO02 ECSPI2_SS1 EPDC_SDOE

LCD interface signal or universal GPIO with 3.3V logic levels.
161 LCD LCD-CLK LCD_CLK LCDIF_WR_RWN

UART4_TX SAI3_MCLK EIM_CS2_B GPIO3_IO00 WDOG1_WDOG_RST_B_DEB EPDC_SDCLK

LCD interface signal or universal GPIO with 3.3V logic levels.
162 LCD LCD-VSYNC LCD_VSYNC LCDIF_BUSY

UART4_RTS_B SAI3_RX_DATA WDOG2_WDOG_B GPIO3_IO03 ECSPI2_SS2 EPDC_SDCE00

LCD interface signal or universal GPIO with 3.3V logic levels.
163 LCD LCD-ENABLE LCD_ENABLE LCDIF_RD_E

UART4_RX SAI3_TX_SYNC EIM_CS3_B GPIO3_IO01 ECSPI2_RDY EPDC_SDLE

LCD interface signal or universal GPIO with 3.3V logic levels.
164 LCD LCD-DATA2 LCD_DATA02 PWM3_OUT

ENET1_1588_EVENT3_IN I2C4_SDA GPIO3_IO07 SRC_BT_CFG02 SAI1_TX_BCLK EPDC_SDDO02

LCD interface signal or universal GPIO with 3.3V logic levels.
165 Power GND - - -
166 LCD LCD-DATA7 LCD_DATA07 UART7_RTS_B

ENET2_1588_EVENT3_OUT SPDIF_EXT_CLK GPIO3_IO12 SRC_BT_CFG07 ECSPI1_SS3 EPDC_SDDO07

LCD interface signal or universal GPIO with 3.3V logic levels.
167 SDIO SDIO1-D0 SD1_DATA0 GPT2_COMPARE3

SAI2_TX_SYNC FLEXCAN1_TX EIM_ADDR21 GPIO2_IO18 ANATOP_OTG1_ID

SDIO interface signal or universal GPIO with 3.3V logic levels.
168 Power GND - - -
169 SDIO SDIO1-D3 SD1_DATA3 GPT2_CAPTURE2

SAI2_TX_DATA FLEXCAN2_RX EIM_ADDR24 GPIO2_IO21 CCM_CLKO2 ANATOP_OTG2_ID

SDIO interface signal or universal GPIO with 3.3V logic levels.
170 Power GND - - -
171 SDIO SDIO1-D1 SD1_DATA1 GPT2_CLK

SAI2_TX_BCLK FLEXCAN1_RX EIM_ADDR22 GPIO2_IO19 USB_OTG2_PWR

SDIO interface signal or universal GPIO with 3.3V logic levels.
172 Power GND - - -
173 SDIO SDIO1-CMD SD1_CMD GPT2_COMPARE1

SAI2_RX_SYNC SPDIF_OUT EIM_ADDR19 GPIO2_IO16 SDMA_EXT_EVENT00 USB_OTG1_PWR

SDIO interface signal or universal GPIO with 3.3V logic levels.
174 Power GND - - -
175 SDIO SDIO1-D2 SD1_DATA2 GPT2_CAPTURE1

SAI2_RX_DATA FLEXCAN2_TX EIM_ADDR23 GPIO2_IO20 CCM_CLKO1 USB_OTG2_OC

SDIO interface signal or universal GPIO with 3.3V logic levels.
176 Power GND - - -
177 Power GND - - -
178 Power GND - - -
179 SDIO SDIO1-CLK SD1_CLK GPT2_COMPARE2

SAI2_MCLK SPDIF_IN EIM_ADDR20 GPIO2_IO17 USB_OTG1_OC

SDIO interface signal or universal GPIO with 3.3V logic levels.
180 Power GND - - -
181 Power GND - - -
182 Power GND - - -
183 CSI CSI-PIXCLK CSI_PIXCLK

BT-WAKE in SOM with WiFi/BT module

USDHC2_WP

RAWNAND_CE3_B I2C1_SCL EIM_OE GPIO4_IO18 SNVS_HP_VIO_5 UART6_RX ESAI_TX2_RX3

Video CMOS sensor signal or universal GPIO with 3.3V logic levels.
184 Power GND - - -
185 Power GND - - -
186 CSI CSI-DATA6 CSI_DATA06

BT-PCM-OUT in SOM with WiFi/BT module

USDHC2_DATA6

ECSPI1_MOSI EIM_AD06 GPIO4_IO27 SAI1_RX_DATA USDHC1_RESET_BE SAI_TX5_RX0

Video CMOS sensor signal or universal GPIO with 3.3V logic levels.
187 CSI CSI-MCLK CSI_MCLK

BT-ENABLE in SOM with WiFi/BT module

USDHC2_CD_B

RAWNAND_CE2_B I2C1_SDA EIM_CS0_B GPIO4_IO17 SNVS_HP_VIO_5_CTL UART6_TX ESAI_TX3_RX2

Video CMOS sensor signal or universal GPIO with 3.3V logic levels.
188 CSI CSI-DATA7 CSI_DATA07

BT-PCM-IN in SOM with WiFi/BT module

USDHC2_DATA7

ECSPI1_MISO EIM_AD07 GPIO4_IO28 SAI1_TX_DATA USDHC1_VSELECT ESAI_TX0

Video CMOS sensor signal or universal GPIO with 3.3V logic levels.
189 Power GND - - -
190 CSI CSI-DATA5 CSI_DATA05

BT-PCM-CLK in SOM with WiFi/BT module

USDHC2_DATA5

USDHC2_DATA5 EIM_AD05 GPIO4_IO26 SAI1_TX_BCLK USDHC1_CD_BE SAI_TX_CLK

Video CMOS sensor signal or universal GPIO with 3.3V logic levels.
191 CSI CSI-DATA4 CSI_DATA04

BT-PCM-SYNC in SOM with WiFi/BT module

USDHC2_DATA4

ECSPI1_SCLK EIM_AD04 GPIO4_IO25 SAI1_TX_SYNC USDHC1_WP ESAI_TX_FS

Video CMOS sensor signal or universal GPIO with 3.3V logic levels.
192 CSI CSI-DATA3 CSI_DATA03

BT-CTS in SOM with WiFi/BT module

USDHC2_DATA3

ECSPI2_MISO EIM_AD03 GPIO4_IO24 SAI1_RX_BCLK UART5_CTS_B ESAI_RX_CLK

Video CMOS sensor signal or universal GPIO with 3.3V logic levels.
193 CSI CSI-DATA1 CSI_DATA01

BT-TXD in SOM with WiFi/BT module

USDHC2_DATA1

ECSPI2_SS0 EIM_AD01 GPIO4_IO22 SAI1_MCLK UART5_RX ESAI_RX_HF_CLK

Video CMOS sensor signal or universal GPIO with 3.3V logic levels.
194 CSI CSI-DATA2 CSI_DATA02

BT-RTS in SOM with WiFi/BT module

USDHC2_DATA2

ECSPI2_MOSI EIM_AD02 GPIO4_IO23 SAI1_RX_SYNC UART5_RTS_B ESAI_RX_FS

Video CMOS sensor signal or universal GPIO with 3.3V logic levels.
195 CSI CSI-DATA0 CSI_DATA00

BT-RXD in SOM with WiFi/BT module

USDHC2_DATA0

ECSPI2_SCLK EIM_AD00 GPIO4_IO21 SRC_INT_BOOT UART5_TX ESAI_TX_HF_CLK

Video CMOS sensor signal or universal GPIO with 3.3V logic levels.
196 Power CSI-VREF - - Leave open if not used.
197 CSI CSI-HSYNC CSI_HSYNC

WLAN-HWAKE in SOM with WiFi/BT module

USDHC2_CMD

I2C2_SCL EIM_LBA_B GPIO4_IO20 PWM8_OUT UART6_CTS_B ESAI_TX1

Video CMOS sensor signal or universal GPIO with 3.3V logic levels.
198 CSI CSI-VSYNC CSI_VSYNC

BT-HWAKE in SOM with WiFi/BT module

SDHC2_CLK

I2C2_SDA EIM_RW GPIO4_IO19 PWM7_OUT UART6_RTS_B ESAI_TX4_RX1

Video CMOS sensor signal or universal GPIO with 3.3V logic levels.
199 Power GND - - -
200 Power GND - - -

Dimensions

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